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5962-9450801Q3A中文资料

厂家型号

5962-9450801Q3A

文件大小

385.69Kbytes

页面数量

16

功能描述

9-BIT BUS-INTERFACE FLIP-FLOPS WITH 3-STATE OUTPUTS

Flip Flop D-Type Bus Interface Pos-Edge 3-ST 1-Element 28-Pin LCCC Tube

数据手册

下载地址一下载地址二到原厂下载

生产厂商

TI2

5962-9450801Q3A数据手册规格书PDF详情

State-of-the-Art EPIC-IIBE BiCMOS Design

Significantly Reduces Power Dissipation

ESD Protection Exceeds 2000 V Per

MIL-STD-883, Method 3015; Exceeds 200 V

Using Machine Model (C = 200 pF, R = 0)

Latch-Up Performance Exceeds 500 mA Per

JEDEC Standard JESD-17

Typical VOLP (Output Ground Bounce) < 1 V

at VCC = 5 V, TA = 25°C

High-Impedance State During Power Up

and Power Down

High-Drive Outputs (–32-mA IOH, 64-mA IOL)

Buffered Control Inputs to Reduce

dc Loading Effects

Package Options Include Plastic

Small-Outline (DW) and Shrink

Small-Outline (DB) Packages, Ceramic Chip

Carriers (FK) and Flatpacks (W), and

Standard Plastic (NT) and Ceramic (JT)

DIPs

description

These 9-bit flip-flops feature 3-state outputs

designed specifically for driving highly capacitive

or relatively low-impedance loads. They are

particularly suitable for implementing wider buffer

registers, I/O ports, bidirectional bus drivers with

parity, and working registers.

With the clock-enable (CLKEN) input low, the nine

D-type edge-triggered flip-flops enter data on the

low-to-high transitions of the clock. Taking CLKEN

high disables the clock buffer, thus latching the

outputs. Taking the clear (CLR) input low causes

the nine Q outputs to go low, independently of the

clock.

A buffered output-enable (OE) input can be used to place the nine outputs in either a normal logic state (high

or low logic level) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive

the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines

without need for interface or pullup components.

When VCC is between 0 and 2.1 V, the device is in the high-impedance state during power up or power down.

However, to ensure the high-impedance state above 2.1 V, OE should be tied to VCC through a pullup resistor;

the minimum value of the resistor is determined by the current-sinking capability of the driver.

The SN54ABT823 is characterized for operation over the full military temperature range of –55°C to 125°C. The

SN74ABT823 is characterized for operation from –40°C to 85°C.

5962-9450801Q3A产品属性

  • 类型

    描述

  • 型号

    5962-9450801Q3A

  • 制造商

    Texas Instruments

  • 功能描述

    Flip Flop D-Type Bus Interface Pos-Edge 3-ST 1-Element 28-Pin LCCC Tube

  • 制造商

    Texas Instruments

  • 功能描述

    FLIP FLOP D-TYPE BUS INTRFC POS-EDGE 3-ST 1-ELEM 28LCCC - Rail/Tube

更新时间:2025-11-30 11:01:00
供应商 型号 品牌 批号 封装 库存 备注 价格
TI
18+
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TI
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TI(德州仪器)
24+
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1476
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TI/德州仪器
25+
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13000
原装正品长期现货
TI
三年内
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只做原装正品
CYPRESS
22+
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原装正品