1 Features

1• QMLV (QML Class V) MIL-PRF-38535 Qualified,

SMD 5962-07204

– 5962-0720401VXC – Qualified over the

Military Temperature Range (–55°C to 125°C)

– 5962-0720402VXC – Qualified over Reduced

Temperature Range (–55°C to 115°C) for

Improved Dynamic Performance

• High-Performance 52-Pin Ceramic Quad Flat

Pack (HFG)

• 400-MSPS Update Rate

• LVDS-Compatible Input Interface

• Spurious-Free Dynamic Range (SFDR) to Nyquist

– 69 dBc at 70 MHz IF, 400 MSPS

• W-CDMA Adjacent Channel Power Ratio (ACPR)

– 73 dBc at 30.72 MHz IF, 122.88 MSPS

– 71 dBc at 61.44 MHz IF, 245.76 MSPS

• Differential Scalable Current Outputs: 2 to 20 mA

• On-Chip 1.2-V Reference

• Single 3.3-V Supply Operation

• Power Dissipation: 660 mW at ƒCLK = 400 MSPS,

ƒOUT = 20 MHz

2 Applications

• Radiation Hardened Digital to Analog (DAC)

Applications

• Space Satellite RF Data Transmission

• Cellular Base Transceiver Station Transmit

Channel:

– CDMA: WCDMA, CDMA2000, IS-95

– TDMA: GSM, IS-136, EDGE/GPRS

– Supports Single-Carrier and Multicarrier

Applications

• Engineering Evaluation (/EM) Samples are

Available (1)

3 Description

The DAC5675A-SP is a radiation-tolerant, 14-bit

resolution high-speed digital-to-analog converter

(DAC) primarily suited for space satellite applications.

The DAC5675A-SP is designed for high-speed digital

data transmission in wired and wireless

communication systems, high-frequency direct digital

synthesis (DDS), and waveform reconstruction in test

and measurement applications. The DAC5675A-SP

has excellent SFDR at high intermediate frequencies,

which makes it well suited for multicarrier

transmission in TDMA and CDMA based cellular base

transceiver stations (BTSs).

The DAC5675A-SP operates from a single supply

voltage of 3.3 V. Power dissipation is 660 mW at

ƒCLK = 400 MSPS, ƒOUT = 70 MHz. The DAC5675ASP

provides a nominal full-scale differential current

output of 20 mA, supporting both single-ended and

differential applications. The output current can be

directly fed to the load with no additional external

output buffer required. The output is referred to the

analog supply voltage AVDD.

The DAC5675A-SP includes a low-voltage differential

signaling (LVDS) interface for high-speed digital data

input. LVDS features a low differential voltage swing

with a low constant power consumption across

frequency, allowing for high-speed data transmission

with low noise levels (low electromagnetic

interference (EMI)).