位置:SN74LV4T125-Q1 > SN74LV4T125-Q1详情

SN74LV4T125-Q1中文资料

厂家型号

SN74LV4T125-Q1

文件大小

1055.24Kbytes

页面数量

23

功能描述

SN74LV4T125-EP Single Power Supply Quadruple Buffer Translator GATE With 3- State Output CMOS Logic Level Shifter

数据手册

下载地址一下载地址二到原厂下载

生产厂商

TI1

SN74LV4T125-Q1数据手册规格书PDF详情

1 Features

• Wide operating range of 1.8V to 5.5V

• Single-supply voltage translator (refer to LVxT

Enhanced Input Voltage):

– Up translation:

• 1.2V to 1.8V

• 1.5V to 2.5V

• 1.8V to 3.3V

• 3.3V to 5.0V

– Down translation:

• 5.0V, 3.3V, 2.5V to 1.8V

• 5.0V, 3.3V to 2.5V

• 5.0V to 3.3V

• 5.5V tolerant input pins

• Supports standard pinouts

• Up to 150Mbps with 5V or 3.3V VCC

• Latch-up performance exceeds 250mA per JESD

17

2 Applications

• Enable or disable a digital signal

• Controlling an indicator LED

• Translation between communication modules and

system controllers

3 Description

The SN74LV4T125-EP contains four independent

buffers with 3-state outputs and extended voltage

operation to allow for level translation. Each buffer

performs the Boolean function Y = A in positive logic.

The outputs can be put into a high impedance (Hi-Z)

state by applying a HIGH on the OE pin. The output

level is referenced to the supply voltage (VCC) and

supports 1.8V, 2.5V, 3.3V, and 5V CMOS levels.

The input is designed with a lower threshold circuit to

support up translation for lower voltage CMOS inputs

(for example, 1.2V input to 1.8V output or 1.8V input

to 3.3V output). In addition, the 5V tolerant input pins

enable down translation (for example, 3.3V to 2.5V

output).

更新时间:2026-2-27 16:13:00
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