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PS62916QRPYRQ1中文资料

厂家型号

PS62916QRPYRQ1

文件大小

2928.61Kbytes

页面数量

41

功能描述

TPS6291x-Q1 3V to 17V, 4.5A/6A/8A, Automotive, Low Noise and Low Ripple Buck Converter With Integrated Ferrite Bead Filter Compensation

数据手册

下载地址一下载地址二到原厂下载

生产厂商

TI1

PS62916QRPYRQ1数据手册规格书PDF详情

1 Features

• AEC-Q100 qualified for automotive applications:

– Temperature grade 1: -40°C to +125°C, TA

• Functional Safety-Capable

– Documentation available to aid functional safety

system design

• Low output 1/f noise < 20μVRMS (100Hz to

100kHz)

• Low output voltage ripple < 10μVRMS after ferrite

bead

• High PSRR of > 65dB (up to 100kHz)

• 2.2MHz, 1.4MHz, or 1.0MHz fixed frequency peak

current mode control

• Synchronizable with external clock (optional)

• Integrated loop compensation supports ferrite

bead for second stage L-C filter with 30dB

attenuation (optional)

• Spread spectrum modulation (optional)

• 3.0V to 17V input voltage range

• 0.8V to 5.5V output voltage range

• 25mΩ/7mΩ RDSon

• Output voltage accuracy of ±1% over temperature

• Precise enable input allows

– User-defined undervoltage lockout

– Exact sequencing

• Adjustable soft start

• Power-good output

• Output discharge (optional)

• –55°C to 150°C junction temperature range

• 2.0mm × 3.0mm QFN with 0.5mm pitch

• Create a custom design using the TPS6291x-Q1

with the WEBENCH® Power Designer

2 Applications

• Advanced driver assistance systems (ADAS)

• Zone architecture

3 Description

The automotive-qualified TPS6291x-Q1 devices are

a family of high-efficiency, low noise, and low ripple

current mode synchronous buck converters. The

devices are designed for noise sensitive applications

that normally use an LDO for post regulation such as

high-speed ADCs, clock and jitter cleaner, serializer,

de-serializer, and radar applications.

To reduce the output voltage ripple, the device

loop compensation is designed to operate with an

optional second-stage ferrite bead L-C filter. Lowfrequency

noise levels, similar to a low-noise LDO,

are further achieved by filtering the internal voltage

reference with a capacitor connected to the NR/SS

pin. Combined, these features allow for an output

voltage ripple below 10μVRMS.

The device operates at a fixed switching frequency of

2.2MHz, 1.4MHz, or 1MHz, and can be synchronized

to an external clock. An optional spread spectrum

modulation scheme spreads the DC/DC switching

frequency over a wider span, which lowers the mixing

spurs.

更新时间:2021-9-14 10:50:00
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