1 Features

• IEEE802.3bp 1000BASE-T1 compliant

• OA TC10 compliant, <20μA sleep current

– Local and remote wake up and wake

forwarding

• Advanced TSN

– IEEE 1588v2/802.1AS Time Synchronization

– Hardware time-stamping with integrated phase

correction

– Highly accurate 1pps signal (±15ns)

• Audio Clocking

– AVB IEEE 1722 media clock generation

capability

– Phase synchronized wall clock output: 1KHz to

50MHz

– I2S & TDM8 SCLK/FSYNC/MCLK clock

generation

• Open Alliance TC12 Interoperability and EMC

compliant

– OA EMC compliant

– SAE J2962-3 EMC Compliant

• Integrated LPF on MDI pins

• MAC Interfaces: MII, RMII, RGMII, and SGMII

• Supported I/O voltages: 3.3V, 2.5V, and 1.8V

• Pin compatible with TI's 100BASE-T1 PHYs and

1000BASE-T1 PHYs

– Single board design for 100BASE-T1 and

1000BASE-T1 with required BOM change

• Diagnostic tool kit

– Temperature, Voltage, ESD monitor

– Data throughput calculator : Inbuilt MAC packet

generator, counter and error checker

– Signal Quality Indicator

– TDR based open and short cable fault detection

– CQI for cable degradation monitoring

– Loopback modes

• AEC-Q100 Qualified

– IEC61000-4-2 ESD : ±8kV contact discharge

2 Applications

• Telematics control unit (TCU, TBOX)

• AVB

• ADAS: LIDAR, RADAR, Front Camera

• Zonal, Gateway, and body control

3 Description

The DP83TG721-Q1 is an IEEE 802.3bp and

Open Alliance compliant automotive 1000Base-T1

Ethernet physical layer transceiver. The DP83TG721-

Q1 provides all physical layer functions needed to

transmit and receive data over unshielded/shielded

single twisted-pair cables. The device provides xMII

flexibility with support for RGMII and SGMII MAC

interfaces.

DP83TG721-Q1 supports OA TC10 low power sleep

feature (with wake forwarding) to reduce system

power consumption when communication is not

required. This device offers the Diagnostic Tool Kit,

with an extensive list of real-time monitoring tools,

debug tools and test modes.

DP83TG721-Q1 integrates IEEE 1588v2/802.1AS

hardware time stamping & fractional PLL enabling

highly accurate time synchronization. The fractional

PLL enables frequency/phase synchronization of the

Wall Clock eliminating need for external VCXO

and generating wide range of time synchronized

frequencies needed for Audio, Video and other ADAS

applications.

DP83TG721-Q1 also integrates IEEE 1722 CRF

decode to generate Media Clock (wall clock

synchronized) for AVB & other Audio standards.

The DP83TG721-Q1 is also capable of generating

FSYNC/SCLK (wall clock synchronized) for I2S/TDM8

interface needed for audio applications.

The DP83TG721-Q1 is compatible to TI's 100BASET1

PHYs and 1000BASE-T1 PHYs enabling design

scalability with single board for both speeds.