位置:SN74LV595A-Q1 > SN74LV595A-Q1详情

SN74LV595A-Q1中文资料

厂家型号

SN74LV595A-Q1

文件大小

1907.87Kbytes

页面数量

32

功能描述

SN74LV595A-Q1 8-Bit Shift Registers With 3-State Output Registers

数据手册

下载地址一下载地址二到原厂下载

生产厂商

TI

SN74LV595A-Q1数据手册规格书PDF详情

1 Features

• Qualified for automotive applications

• Available in wettable flank QFN (WBQB) package

• Customer-specific configuration control can be

supported along with major-change approval

• 2-V to 5.5-V VCC operation

• Typical VOLP (output ground bounce) < 0.8 V at

VCC = 3.3 V, TA = 25°C

• Typical VOHV (output VOH undershoot) > 2.3 V at

VCC = 3.3 V, TA = 25°C

• Supports mixed-mode voltage operation on all

ports

• 8-bit serial-in, parallel-out shift

• Ioff supports partial-power-down mode operation

• Shift register has direct clear

2 Applications

• Output expansion

• LED matrix control

• 7-segment display control

3 Description

The SN74LV595A-Q1 contains an 8-bit serial-in,

parallel-out shift register that feeds an 8-bit D-type

storage register. The storage register has parallel 3-

state outputs. Separate clocks are provided for both

the shift and storage register. The shift register has

a direct overriding clear (SRCLR) input, serial (SER)

input, and a serial output for cascading. When the

output-enable (OE) input is high, all outputs except

QH' are in the high-impedance state.

The device is fully specified for partial-power-down

applications using Ioff. The Ioff circuitry disables

the outputs, preventing damaging current backflow

through the device when it is powered down.

更新时间:2026-2-22 8:01:00
供应商 型号 品牌 批号 封装 库存 备注 价格
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现货