1 Features

• AEC-Q100 qualified with the following results:

– Device HBM ESD classification level 2000-V

– Device CDM ESD classification level 1000-V

• Available in wettable flank VQFN (RKS) package

• Provides bidirectional voltage translation with no

direction pin

• Supports up to 100 MHz up translation and

greater than 100 MHz down translation at ≤ 30-pF

capacitive load and up to 40 MHz up or down

translation at 50-pF capacitive load

• Supports hot insertion

• Allow bidirectional voltage level translation

between

– 0.95 V ↔ 1.8 V, 2.5 V, 3.3 V, 5 V

– 1.2 V ↔ 1.8 V, 2.5 V, 3.3 V, 5 V

– 1.8 V ↔ 2.5 V, 3.3 V, 5 V

– 2.5 V ↔ 3.3 V, 5 V

– 3.3 V ↔ 5 V

• Low standby current

• 5-V tolerance I/O port to support TTL

• Low ron provides less signal distortion

• High-impedance I/O pins for EN = low

• Flow-through pinout for easy PCB trace routing

• Latch-up performance exceeds 100 mA per JESD

17

• –40°C to +125°C operating temperature range

2 Applications

• GPIO, MDIO, PMBus, SMBus, SDIO, UART, I2C,

and other interfaces in telecom infrastructure

• Infotainment and cluster

• Body electronics and lighting

• Hybrid, electric, and powertrain systems

• Passive safety

• ADAS

3 Description

• Supports up to 100 MHz up translation and greater

than 100 MHz down translation at ≦ 30 pF cap

load and up to 40 MHz up and down translation at

50 pF capacitive load:

– Allows the LSF family to support more

consumer or telecom interfaces (MDIO or

SDIO)

• Bidirectional voltage translation without DIR pin:

– Minimizes system effort to develop voltage

translation for bidirectional interface (PMBus,

I2C, or SMbus)

• 5 V tolerance on IO port and 125°C support:

– With 5 V tolerance and 125°C support, the LSF

family is flexible and compliant with TTL levels

in industrial and telecom applications

• Channel specific translation:

– The LSF family is able to set up different

voltage translation levels on each channel