位置:DS320PR1601ZDGT > DS320PR1601ZDGT详情

DS320PR1601ZDGT中文资料

厂家型号

DS320PR1601ZDGT

文件大小

2175.59Kbytes

页面数量

44

功能描述

DS320PR1601 32 Gbps 16 Lane PCIe® 5.0, CXL 2.0 Linear Redriver

数据手册

下载地址一下载地址二到原厂下载

生产厂商

TI

DS320PR1601ZDGT数据手册规格书PDF详情

1 Features

• 16-lane linear redriver supporting PCIe® 5.0, CXL

2.0, CCIX , and UPI 2.0

• Supports data rates up to 32-Gbps

• Intel retimer common footprint compatible

• 64 integrated AC coupling capacitors on Tx pins

inside package saving board space

• CTLE boosts of 21 dB at 16 GHz

• Ultra-low latency of 130 ps

• Low additive random jitter of 50 fs for PRBS data

• Single 3.3 V supply

• Low active power of 164 mW/channel

• I2C/SMBus or EEPROM programming

• Automatic receiver detection for PCIe use cases

• Seamless support for PCIe link training

• Internal voltage regulator provides immunity to

supply noise

• Support for x4, x8, x16 bus width

• 8.90 mm × 22.80 mm BGA package

2 Applications

• Rack server, Microserver, and tower server

• High performance computing

• Hardware accelerator

• Network attached storage

• Storage area network (SAN) and host bus adapter

(HBA) card

• Network interface card (NIC)

• Desktop PC or motherboard

3 Description

The DS320PR1601 is a 32-channel (16-channel

in each direction) or x16 (16-lane) low-power highperformance

linear repeater or redriver designed

to support PCIe 5.0, CXL 2.0, UPI 2.0 and other

interfaces up to 32 Gbps.

The DS320PR1601 receivers deploy continuous time

linear equalizers (CTLE) to provide a programmable

high-frequency boost. The equalizer can open an

input eye that is completely closed due to intersymbol

interference (ISI) induced by an interconnect

medium, such as PCB traces. The CTLE receiver is

followed by a linear output driver. The linear datapaths

of DS320PR1601 preserves transmit preset signal

characteristics. The linear redriver becomes part of

the passive channel that as a whole get link trained

for best transmit and receive equalization settings.

This transparency in the link training protocol results

in best electrical link and lowest possible latency.

Low channel-channel cross-talk, low additive jitter

and excellent return loss makes the device almost a

passive element in the link, but with its equalization.

更新时间:2025-8-16 9:31:00
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