TPS650864 Configurable Multirail PMU for Xilinx® MPSoCs and FPGAs

1 Features • Wide VIN range from 5.6V to 21V • Three variable-output voltage synchronous step-down controllers with D-CAP2™ Topology – Scalable output current using external fets with selectable current limit – I2C DVS control from 0.41V to 1.67V in 10mV steps or 1V to 3.575V in 25mV steps

Configurable Multirail PMU for Xilinx MPSoCs and FPGAs

文件：2.75829 Mbytes Page：126 Pages

封装/外壳：64-VFQFN 裸露焊盘 包装：管件 描述：IC REG CTLR DGTL CAM 9OUT 64VQFN 集成电路（IC） 特殊用途稳压器

TPS650864 Configurable Multirail PMU for Xilinx® MPSoCs and FPGAs

1 Features • Wide VIN range from 5.6V to 21V • Three variable-output voltage synchronous step-down controllers with D-CAP2™ Topology – Scalable output current using external fets with selectable current limit – I2C DVS control from 0.41V to 1.67V in 10mV steps or 1V to 3.575V in 25mV steps

TPS650864 Configurable Multirail PMU for Xilinx® MPSoCs and FPGAs

1 Features • Wide VIN range from 5.6V to 21V • Three variable-output voltage synchronous step-down controllers with D-CAP2™ Topology – Scalable output current using external fets with selectable current limit – I2C DVS control from 0.41V to 1.67V in 10mV steps or 1V to 3.575V in 25mV steps

TPS650864 Configurable Multirail PMU for Xilinx® MPSoCs and FPGAs

1 Features • Wide VIN range from 5.6V to 21V • Three variable-output voltage synchronous step-down controllers with D-CAP2™ Topology – Scalable output current using external fets with selectable current limit – I2C DVS control from 0.41V to 1.67V in 10mV steps or 1V to 3.575V in 25mV steps

Configurable Multirail PMU for Xilinx MPSoCs and FPGAs

文件：2.75829 Mbytes Page：126 Pages