SINGLE BUFFER GATE CMOS LOGIC LEVEL SHIFTER

Features » Operate from 1.6V to 5.5V o Low Power Current: lcc=10pA (Max.) +8mA Output Drive (VCC=5.0V) Power Down Protection » ESD Protection Exceeds JESD 22 -2000-V Human-Body Model (A114-A) -200-V Machine Model (A115-A) -1000-V Charged-Device Model (C101)

SINGLE BUFFER GATE CMOS LOGIC LEVEL SHIFTER

Features » Operate from 1.6V to 5.5V o Low Power Current: lcc=10pA (Max.) +8mA Output Drive (VCC=5.0V) Power Down Protection » ESD Protection Exceeds JESD 22 -2000-V Human-Body Model (A114-A) -200-V Machine Model (A115-A) -1000-V Charged-Device Model (C101)

SINGLE BUFFER GATE CMOS LOGIC LEVEL SHIFTER

Features » Operate from 1.6V to 5.5V o Low Power Current: lcc=10pA (Max.) +8mA Output Drive (VCC=5.0V) Power Down Protection » ESD Protection Exceeds JESD 22 -2000-V Human-Body Model (A114-A) -200-V Machine Model (A115-A) -1000-V Charged-Device Model (C101)

逻辑门

Single supply translating buffer

1. General description The 74LV1T34 is a single, level translating buffer. The low threshold inputs support 1.8 V input logic at VCC = 3.3 V and can be used in 1.8 V to 3.3 V level up translation. In addition, the 5 V tolerant input pins enable level down translation (3.3 V to 2.5 V output at V

Single supply translating buffer

1. General description The 74LV1T34 is a single, level translating buffer. The low threshold inputs support 1.8 V input logic at VCC = 3.3 V and can be used in 1.8 V to 3.3 V level up translation. In addition, the 5 V tolerant input pins enable level down translation (3.3 V to 2.5 V output at V

Single supply translating buffer

1. General description The 74LV1T34 is a single, level translating buffer. The low threshold inputs support 1.8 V input logic at VCC = 3.3 V and can be used in 1.8 V to 3.3 V level up translation. In addition, the 5 V tolerant input pins enable level down translation (3.3 V to 2.5 V output at V

Single supply translating buffer

1. General description The 74LV1T34 is a single, level translating buffer. The low threshold inputs support 1.8 V input logic at VCC = 3.3 V and can be used in 1.8 V to 3.3 V level up translation. In addition, the 5 V tolerant input pins enable level down translation (3.3 V to 2.5 V output at V

Single Power Supply Quadruple Buffer Translator GATE With 3-State Output CMOS Logic Level Shifter

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