10-BIT ANALOG-TO-DIGITAL CONVERTERS WITH SERIAL CONTROL

10-Bit-Resolution A/D Converter Inherent Sample and Hold Total Unadjusted Error . . . ±1 LSB Max On-Chip System Clock Terminal Compatible With TLC549 and TLV1549 CMOS Technology description The TLC1549C, TLC1549I, and TLC1549M are 10-bit, switched-capacitor, successiveapproximation ana

10-BIT ANALOG-TO-DIGITAL CONVERTERS WITH SERIAL CONTROL

文件：257.91 Kbytes Page：18 Pages

封装/外壳：8-DIP（0.300"，7.62mm） 包装：管件 描述：IC ADC 10BIT SAR 8DIP 集成电路（IC） 模数转换器（ADC）

10-BIT ANALOG-TO-DIGITAL CONVERTERS WITH SERIAL CONTROL

文件：238.04 Kbytes Page：15 Pages

10-BIT ANALOG-TO-DIGITAL CONVERTERS WITH SERIAL CONTROL

文件：254.62 Kbytes Page：17 Pages

10-BIT ANALOG-TO-DIGITAL CONVERTERS WITH SERIAL CONTROL

10-Bit-Resolution A/D Converter Inherent Sample and Hold Total Unadjusted Error . . . ±1 LSB Max On-Chip System Clock Terminal Compatible With TLC549 and TLV1549 CMOS Technology description The TLC1549C, TLC1549I, and TLC1549M are 10-bit, switched-capacitor, successiveapproximation ana

10-BIT ANALOG-TO-DIGITAL CONVERTERS WITH SERIAL CONTROL

10-Bit-Resolution A/D Converter Inherent Sample and Hold Total Unadjusted Error . . . ±1 LSB Max On-Chip System Clock Terminal Compatible With TLC549 and TLV1549 CMOS Technology description The TLC1549C, TLC1549I, and TLC1549M are 10-bit, switched-capacitor, successiveapproximation ana

10-BIT ANALOG-TO-DIGITAL CONVERTERS WITH SERIAL CONTROL

文件：257.91 Kbytes Page：18 Pages

10-BIT ANALOG-TO-DIGITAL CONVERTERS WITH SERIAL CONTROL

文件：254.62 Kbytes Page：17 Pages

封装/外壳：8-DIP（0.300"，7.62mm） 包装：卷带（TR） 描述：IC ADC 10BIT SAR 8DIP 集成电路（IC） 模数转换器（ADC）

Laser Diode Driver

Description The CXB1549Q is a high-speed monolithic Laser Diode Driver/Current Switch with ECL/PECL input level. Open collector outputs are provided at the output pins (Q, QBX) and have the capacity of driving modulation current of 50mAp-p at a max. data rate of 1.25Gbps (Min.). Along with the mo

Laser Diode Driver

Description The CXB1549Q is a high-speed monolithic Laser Diode Driver/Current Switch with ECL/PECL input level. Open collector outputs are provided at the output pins (Q, QBX) and have the capacity of driving modulation current of 50mAp-p at a max. data rate of 1.25Gbps (Min.). Along with the mo

Broadband Resistive Power Divider

文件：530.46 Kbytes Page：1 Pages

T1/CEPT Line Interface Transformers

文件：47.64 Kbytes Page：1 Pages

2A High Efficiency Step-Up DC/DC Voltage Regulator

文件：711.59 Kbytes Page：6 Pages