8W8W15WTRIPLEAMPLIFIER

DESCRIPTION TheTDA7497SAisatriple8+8+15WclassABpoweramplifierassembledinthe@Clipwatt15package,speciallydesignedforhighqualitysound,TVapplications. FeaturesoftheTDA7497SAincludemutefunctionsindependentlycontrolledformainandcenterchannels. FEATURES

8.1G(uptoHBR3)DisplayPort™4-laneRe-timer

Features Built-inre-timers −Integratedre-timers(Linktraining-tunablePHYrepeater)forDisplayPortuptoHBR3@8.1Gbps.Supportsbothtransparentmodeandnon-transparentmode(transparentorLTTPR) −Losscompensationtorecoverupto27dB IntegratedAUXpass-through −IntegratedA

6GActiveRe-driverwithLinearEqualizationforHDMI2.0

Features •Built-inRe-driverwithCTLE −IntegratedRe-driverforHDMI2.0upto6Gbps −SupportsDP++,HDMISourceapplications −Losscompensationtorecoverupto-10dBchannelloss@6Gbps •CTLE,FlatGainandSwingconfigurations −Four-laneconfigurationssetbypinstrapping. −Indep

10GActiveMux(1x2)withIntegratedRe-timerforUSB3.2

Features *Built-inre-timer ㅡIntegratedre-timerforUSB3.2uptoGen2@10Gbps —SupportsbothSeparateReferenceClockIndependentSSC(SRIS)andBit-LevelRe-timer(BLR)ArchitecturesofUSB3.2Specification(Appendix-E) —Supportsbothhost(source)anddevice(sink)applicationsinUS

20GActiveRetimerforUSB3.2

Features Built-inre-timer -Integratedre-timerforUSB3.2withtwolanesuptoGen2@10Gbpseachforacombined20Gthroughput -SupportsbothSeparateReferenceClockIndependentSSC(SRIS)andBit-LevelRe-timer(BLR)ArchitecturesofUSB3.2Specification -Supportsbothhost(source)

10GActiveMux(1x2)withIntegratedRe-timerandCCDetectionforUSB3.2

Features Built-inre-timer −Integratedre-timerforUSB3.2uptoGen2@10Gbps −SupportsbothSeparateReferenceClockIndependentSSC(SRIS)andBit-LevelRe-timer(BLR)ArchitecturesofUSB3.2Specification(Appendix-E) −Losscompensationtorecoverupto23dBchannelloss Integrat