SYNCHRONOUS 6-BIT BINARY RATE MULTIPLIERS

Perform Fixed-Rate or Variable-Rate Frequency Division For Applications in Arithmetic, Radar, Digital-to-Analog (D/A), Analog-to-Digital (A/D), and other Conversion Operations Typical Maximum Clock Frequency . . . 32 Megahertz

SYNCHRONOUS 6-BIT BINARY RATE MULTIPLIERS

文件：281.5 Kbytes Page：8 Pages

SYNCHRONOUS 6-BIT BINARY RATE MULTIPLIERS

文件：447.44 Kbytes Page：11 Pages

SYNCHRONOUS 6-BIT BINARY RATE MULTIPLIERS

Perform Fixed-Rate or Variable-Rate Frequency Division For Applications in Arithmetic, Radar, Digital-to-Analog (D/A), Analog-to-Digital (A/D), and other Conversion Operations Typical Maximum Clock Frequency . . . 32 Megahertz

SYNCHRONOUS 6-BIT BINARY RATE MULTIPLIERS

Perform Fixed-Rate or Variable-Rate Frequency Division For Applications in Arithmetic, Radar, Digital-to-Analog (D/A), Analog-to-Digital (A/D), and other Conversion Operations Typical Maximum Clock Frequency . . . 32 Megahertz

封装/外壳：16-DIP（0.300"，7.62mm） 包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 描述：IC SYNC 6BIT BIN RATE MULT 16DIP 集成电路（IC） 专用逻辑器件

SYNCHRONOUS 6-BIT BINARY RATE MULTIPLIERS

文件：447.44 Kbytes Page：11 Pages

SYNCHRONOUS 6-BIT BINARY RATE MULTIPLIERS

文件：281.5 Kbytes Page：8 Pages

SYNCHRONOUS 6-BIT BINARY RATE MULTIPLIERS

文件：447.44 Kbytes Page：11 Pages

SYNCHRONOUS 6-BIT BINARY RATE MULTIPLIERS

文件：447.44 Kbytes Page：11 Pages

8.1G (up to HBR3) DisplayPort™ 4-lane Re-timer

Features  Built-in re-timers − Integrated re-timers (Link training-tunable PHY repeater) for DisplayPort up to HBR3 @ 8.1Gbps. Supports both transparent mode and non-transparent mode (transparent or LTTPR) − Loss compensation to recover up to 27dB  Integrated AUX pass-through − Integrated A

6G Active Re-driver with Linear Equalization for HDMI 2.0

Features • Built-in Re-driver with CTLE − Integrated Re-driver for HDMI2.0 up to 6Gbps − Supports DP++, HDMI Source applications − Loss compensation to recover up to -10dB channel loss @6Gbps • CTLE, Flat Gain and Swing configurations − Four-lane configurations set by pin strapping. − Indep

10G Active Mux (1x2) with Integrated Re-timer for USB 3.2

Features * Built-in re-timer ㅡ Integrated re-timer for USB 3.2 up to Gen2 @ 10Gbps — Supports both Separate Reference Clock Independent SSC (SRIS) and Bit-Level Re-timer (BLR) Architectures of USB 3.2 Specification (Appendix-E) — Supports both host (source) and device (sink) applications in US

20G Active Retimer for USB 3.2

Features  Built-in re-timer - Integrated re-timer for USB 3.2 with two lanes up to Gen2 @ 10Gbps each for a combined 20G throughput - Supports both Separate Reference Clock Independent SSC (SRIS) and Bit-Level Re-timer (BLR) Architectures of USB 3.2 Specification - Supports both host (source)

10G Active Mux (1x2) with Integrated Re-timer and CC Detection for USB 3.2

Features  Built-in re-timer − Integrated re-timer for USB 3.2 up to Gen2 @ 10Gbps − Supports both Separate Reference Clock Independent SSC (SRIS) and Bit-Level Re-timer (BLR) Architectures of USB 3.2 Specification (Appendix-E) − Loss compensation to recover up to 23dB channel loss  Integrat