50 W mono BTL class-D audio amplifier

Description The TDA7492MV is a mono BTL class-D audio amplifier with single power supply designed for home systems and docking stations. Thanks to the high efficiency and an exposed-pad-down (EPD) package no heatsink is required. Features 50 W continuous output power: RL= 6 Ω, THD

50 W mono BTL class-D audio amplifier

Features  50 W continuous output power: RL = 6 , THD = 10% at VCC = 25 V  40 W continuous output power: RL = 8 , THD = 10% at VCC = 25 V  Wide range single supply operation (10 - 26 V)  High efficiency ( = 90%)  Four selectable, fixed gain settings of nominally 21.6 dB,

50W单路BTL D类音频放大器

50 W mono BTL class-D audio amplifier

Features  50 W continuous output power: RL = 6 , THD = 10% at VCC = 25 V  40 W continuous output power: RL = 8 , THD = 10% at VCC = 25 V  Wide range single supply operation (10 - 26 V)  High efficiency ( = 90%)  Four selectable, fixed gain settings of nominally 21.6 dB,

50 W mono BTL class-D audio amplifier

Features  50 W continuous output power: RL = 6 , THD = 10% at VCC = 25 V  40 W continuous output power: RL = 8 , THD = 10% at VCC = 25 V  Wide range single supply operation (10 - 26 V)  High efficiency ( = 90%)  Four selectable, fixed gain settings of nominally 21.6 dB,

DIVIDE-BY-TWELVE COUNTER

DESCRIPTION- The ’92 is a 4-stage ripple counter containing a high speed flip-flop acting as a divide-by-two and three flip-flops connected as a divide-by-six. HIGH signals on the Master Reset (MR) inputs override the clocks and force all outputs to the LOW state.

SIPS Remote Transducer

Description The Type 7492 SIPS Remote Transducer is the general purpose transducer used in SIPS 1 and SIPS 2 systems. The unit is typically used where it may be difficult to mount a complete transceiver unit, either due to limited space or harsh operating environment. By using the remote transdu

DIVIDE-BY-TWELVE COUNTER

DESCRIPTION- The ’92 is a 4-stage ripple counter containing a high speed flip-flop acting as a divide-by-two and three flip-flops connected as a divide-by-six. HIGH signals on the Master Reset (MR) inputs override the clocks and force all outputs to the LOW state.

DIVIDE-BY-TWELVE COUNTER

文件：278.94 Kbytes Page：3 Pages

DIVIDE-BY-TWELVE COUNTER

文件：278.94 Kbytes Page：3 Pages