DUAL J-K FLIP FLOP WITH PRESET AND CLEAR

Dual J-K Flip Flop with Preset and Clear The TC74AC112 is an advanced high speed CMOS DUAL J-K FLIP FLOP fabricated with silicon gate and double-layer metal wiring C2MOS technology. It achieves the high speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low pow

CMOS Digital Integrated Circuit Silicon Monolithic Dual J-K Flip Flop with Preset and Clear

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74AC CMOS logic IC series

CMOS Digital Integrated Circuit Silicon Monolithic Dual J-K Flip Flop with Preset and Clear

文件：313.16 Kbytes Page：9 Pages

Dual J-K Flip Flop with Preset and Clear

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DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET

AC Types Feature 1.5-V to 5.5-V Operation and Balanced Noise Immunity at 30% of the Supply Voltage Speed of Bipolar F, AS, and S, With Significantly Reduced Power Consumption Balanced Propagation Delays ±24-mA Output Drive Current – Fanout to 15 F Devices SCR-Latchup-Resistant CMOS Pro

Dual j-k Flip-Flop with Set and Reset

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DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET

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DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET

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DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET

文件：331.08 Kbytes Page：6 Pages