DESCRIPTION

The ST3413 is the P-Channel logic enhancement mode power field effect transistors are

produced using high cell density, DMOS trench technology.

This high density process is especially tailored to minimize on-state resistance.

These devices are particularly suited for low voltage application suchas cellular phone and

notebook computer power management and other batter powered circuits where high-side

switching, and low in-line power loss are needed in a very small outline surface mount

package.

FEATURE

-20V/-3.4A, RDS(ON) = 95m-ohm @VGS = -4.5V

-20V/-2.4A, RDS(ON)= 120m-ohm @VGS = -2.5V

-20V/-1.7A, RDS(ON)= 145m-ohm @VGS = -1.8V

Super high density cell design for extremely low RDS(ON)

Exceptional on-resistance and maximum DC current capability

SOT-23-3L package design