QUAD DRIVER

DESCRIPTION The SY10/100E112 are quad drivers designed for use in new, high-performance ECL systems. The E112 has two pairs of OR/NOR outputs from each gate and a common, buffered enable input. The data input can also be used as an ECL memory address fan-out driver, although the E111 is designed

封装/外壳：28-LCC（J 形引线） 包装：管件 描述：IC BUF NON-INVERT -5.5V 28PLCC 集成电路（IC） 缓冲器，驱动器，接收器，收发器

QUAD DRIVER

DESCRIPTION The SY10/100E112 are quad drivers designed for use in new, high-performance ECL systems. The E112 has two pairs of OR/NOR outputs from each gate and a common, buffered enable input. The data input can also be used as an ECL memory address fan-out driver, although the E111 is designed

封装/外壳：28-LCC（J 形引线） 包装：管件 描述：IC BUF NON-INVERT -5.5V 28PLCC 集成电路（IC） 缓冲器，驱动器，接收器，收发器

QUAD DRIVER

Description The MC10E/100E112 is a quad driver with two pairs of OR/NOR outputs from each gate, and a common, buffered enable input. Using the data inputs the device can serve as an ECL memory address fan-out driver. Using just the enable input, the device serves as a clock driver, although the M

5V ECL Quad Driver

文件：154.21 Kbytes Page：7 Pages

5V ECL Quad Driver

文件：126.1 Kbytes Page：8 Pages

5V ECL Quad Driver

文件：126.1 Kbytes Page：8 Pages

5V ECL Quad Driver

文件：126.1 Kbytes Page：8 Pages