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QUINT 2-INPUT OR/NOR GATE

DESCRIPTION The SY100S302 offers five 2-input OR/NOR gates designed for use in high-performance ECL systems. The five gates are controlled by a common Enable signal. All inputs have 75kΩ pull-down resistors and all outputs are buffered. FEATURES ■ Max. propagation delay of 700ps ■ IEE min. of

MICREL

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QUINT 2-INPUT OR/NOR GATE

文件:79.2 Kbytes Page:4 Pages

MICREL

麦瑞半导体

QUINT 2-INPUT OR/NOR GATE

DESCRIPTION The SY100S302 offers five 2-input OR/NOR gates designed for use in high-performance ECL systems. The five gates are controlled by a common Enable signal. All inputs have 75kΩ pull-down resistors and all outputs are buffered. FEATURES ■ Max. propagation delay of 700ps ■ IEE min. of

MICREL

麦瑞半导体

QUINT 2-INPUT OR/NOR GATE

DESCRIPTION The SY100S302 offers five 2-input OR/NOR gates designed for use in high-performance ECL systems. The five gates are controlled by a common Enable signal. All inputs have 75kΩ pull-down resistors and all outputs are buffered. FEATURES ■ Max. propagation delay of 700ps ■ IEE min. of

MICREL

麦瑞半导体

QUINT 2-INPUT OR/NOR GATE

文件:79.2 Kbytes Page:4 Pages

MICREL

麦瑞半导体

更新时间:2026-3-5 20:36:03
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