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型号 功能描述 生产厂家 企业 LOGO 操作
SUR549J

Epitaxial planar PNP silicon transistor

Description • Dual chip digital transistor Features • Two SRA2211 chips in SOT-363 package • Simplify circuit design • Reduce a quantity of parts and manufacturing process

AUK

SUR549J

Epitaxial planar PNP silicon transistor

Description • Dual chip digital transistor Features • Two SRA2211 chips in SOT-363 package • Simplify circuit design • Reduce a quantity of parts and manufacturing process

KODENSHI

可天士

SUR549J

Digital Transistors

AUK

NPN general purpose transistors

DESCRIPTION NPN transistor in a TO-92; SOT54 plastic package. PNP complements: BC559 and BC560. FEATURES • Low current (max. 100 mA) • Low voltage (max. 45 V). APPLICATIONS • Low noise stages in audio frequency equipment.

PHILIPS

飞利浦

Low Noise Transistors

Low Noise Transistors NPN Silicon

MOTOROLA

摩托罗拉

NPN general purpose transistors

DESCRIPTION NPN transistor in a TO-92; SOT54 plastic package. PNP complements: BC559 and BC560. FEATURES • Low current (max. 100 mA) • Low voltage (max. 45 V). APPLICATIONS • Low noise stages in audio frequency equipment.

PHILIPS

飞利浦

NPN general purpose transistors

DESCRIPTION NPN transistor in a TO-92; SOT54 plastic package. PNP complements: JC559 and JC560. FEATURES • Low current (max. 100 mA) • Low voltage (max. 45 V). APPLICATIONS • General purpose switching and amplification • Low noise stages in tape recorders, hi-fi amplifiers and other audio-

PHILIPS

飞利浦

NPN general purpose transistors

DESCRIPTION NPN transistor in a TO-92; SOT54 plastic package. PNP complements: JC559 and JC560. FEATURES • Low current (max. 100 mA) • Low voltage (max. 45 V). APPLICATIONS • General purpose switching and amplification • Low noise stages in tape recorders, hi-fi amplifiers and other audio-

PHILIPS

飞利浦

SUR549J产品属性

  • 类型

    描述

  • Classifacation:

    Complex type

  • Device Type:

    SRA2211×2

  • R1 [KΩ]:

    10

  • VO [V]:

    -50

  • IO[mA]:

    -100

  • PD [㎽]:

    200

  • G1[hFE]_Min:

    120

  • G1[hFE]_VO [V]:

    -5

  • G1[hFE]_IO[mA]:

    -1

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