STM8AF6266价格

参考价格:¥13.7602

型号:STM8AF6266TAX 品牌:STM 备注:这里有STM8AF6266多少钱,2026年最近7天走势,今日出价,今日竞价,STM8AF6266批发/采购报价,STM8AF6266行情走势销售排行榜,STM8AF6266报价。
型号 功能描述 生产厂家 企业 LOGO 操作
STM8AF6266

Automotive 8-bit MCU, with up to 32 Kbytes Flash, data EEPROM, 10-bit ADC, timers, LIN, SPI, I2C, 3 to 5.5 V

Introduction This datasheet refers to the STM8AF61xx (STM8AF612x, STM8AF614x, STM8AF6166, and STM8AF6168) and STM8AF62xx products with 16 to 32 Kbytes of Flash program memory. In the order code, the letter ‘F’ refers to product versions with data EEPROM and ‘H’ refers to product versions without

STMICROELECTRONICS

意法半导体

STM8AF6266

Automotive 8-bit MCU, with up to 32 Kbyte Flash, data EEPROM, 10-bit ADC, timers, LIN, SPI, I2C, 3 to 5.5 V

Features • AEC-Q10x qualified • Core – Max fCPU: 16 MHz – Advanced STM8A core with Harvard architecture and 3-stage pipeline – Average 1.6 cycles/instruction resulting in 10 MIPS at 16 MHz fCPU for industry standard benchmark • Memories – Flash Program memory: 16 to 32 Kbyte Flash; data ret

STMICROELECTRONICS

意法半导体

STM8AF6266

汽车级8位MCU,具有32 KB Flash、LIN、16 MHz CPU和集成EEPROM

STMICROELECTRONICS

意法半导体

Automotive 8-bit MCU, with up to 32 Kbyte Flash, data EEPROM, 10-bit ADC, timers, LIN, SPI, I2C, 3 to 5.5 V

Features • AEC-Q10x qualified • Core – Max fCPU: 16 MHz – Advanced STM8A core with Harvard architecture and 3-stage pipeline – Average 1.6 cycles/instruction resulting in 10 MIPS at 16 MHz fCPU for industry standard benchmark • Memories – Flash Program memory: 16 to 32 Kbyte Flash; data ret

STMICROELECTRONICS

意法半导体

Automotive 8-bit MCU, with up to 32 Kbyte Flash, data EEPROM, 10-bit ADC, timers, LIN, SPI, I2C, 3 to 5.5 V

Features • AEC-Q10x qualified • Core – Max fCPU: 16 MHz – Advanced STM8A core with Harvard architecture and 3-stage pipeline – Average 1.6 cycles/instruction resulting in 10 MIPS at 16 MHz fCPU for industry standard benchmark • Memories – Flash Program memory: 16 to 32 Kbyte Flash; data ret

STMICROELECTRONICS

意法半导体

Automotive 8-bit MCU, with up to 32 Kbyte Flash, data EEPROM, 10-bit ADC, timers, LIN, SPI, I2C, 3 to 5.5 V

Features • AEC-Q10x qualified • Core – Max fCPU: 16 MHz – Advanced STM8A core with Harvard architecture and 3-stage pipeline – Average 1.6 cycles/instruction resulting in 10 MIPS at 16 MHz fCPU for industry standard benchmark • Memories – Flash Program memory: 16 to 32 Kbyte Flash; data ret

STMICROELECTRONICS

意法半导体

Automotive 8-bit MCU, with up to 32 Kbyte Flash, data EEPROM, 10-bit ADC, timers, LIN, SPI, I2C, 3 to 5.5 V

Features • AEC-Q10x qualified • Core – Max fCPU: 16 MHz – Advanced STM8A core with Harvard architecture and 3-stage pipeline – Average 1.6 cycles/instruction resulting in 10 MIPS at 16 MHz fCPU for industry standard benchmark • Memories – Flash Program memory: 16 to 32 Kbyte Flash; data ret

STMICROELECTRONICS

意法半导体

Automotive 8-bit MCU, with up to 32 Kbyte Flash, data EEPROM, 10-bit ADC, timers, LIN, SPI, I2C, 3 to 5.5 V

Features • AEC-Q10x qualified • Core – Max fCPU: 16 MHz – Advanced STM8A core with Harvard architecture and 3-stage pipeline – Average 1.6 cycles/instruction resulting in 10 MIPS at 16 MHz fCPU for industry standard benchmark • Memories – Flash Program memory: 16 to 32 Kbyte Flash; data ret

STMICROELECTRONICS

意法半导体

Automotive 8-bit MCU, with up to 32 Kbyte Flash, data EEPROM, 10-bit ADC, timers, LIN, SPI, I2C, 3 to 5.5 V

Features • AEC-Q10x qualified • Core – Max fCPU: 16 MHz – Advanced STM8A core with Harvard architecture and 3-stage pipeline – Average 1.6 cycles/instruction resulting in 10 MIPS at 16 MHz fCPU for industry standard benchmark • Memories – Flash Program memory: 16 to 32 Kbyte Flash; data ret

STMICROELECTRONICS

意法半导体

Automotive 8-bit MCU, with up to 32 Kbyte Flash, data EEPROM, 10-bit ADC, timers, LIN, SPI, I2C, 3 to 5.5 V

Features • AEC-Q10x qualified • Core – Max fCPU: 16 MHz – Advanced STM8A core with Harvard architecture and 3-stage pipeline – Average 1.6 cycles/instruction resulting in 10 MIPS at 16 MHz fCPU for industry standard benchmark • Memories – Flash Program memory: 16 to 32 Kbyte Flash; data ret

STMICROELECTRONICS

意法半导体

Automotive 8-bit MCU, with up to 32 Kbyte Flash, data EEPROM, 10-bit ADC, timers, LIN, SPI, I2C, 3 to 5.5 V

Features • AEC-Q10x qualified • Core – Max fCPU: 16 MHz – Advanced STM8A core with Harvard architecture and 3-stage pipeline – Average 1.6 cycles/instruction resulting in 10 MIPS at 16 MHz fCPU for industry standard benchmark • Memories – Flash Program memory: 16 to 32 Kbyte Flash; data ret

STMICROELECTRONICS

意法半导体

Automotive 8-bit MCU, with up to 32 Kbyte Flash, data EEPROM, 10-bit ADC, timers, LIN, SPI, I2C, 3 to 5.5 V

Features • AEC-Q10x qualified • Core – Max fCPU: 16 MHz – Advanced STM8A core with Harvard architecture and 3-stage pipeline – Average 1.6 cycles/instruction resulting in 10 MIPS at 16 MHz fCPU for industry standard benchmark • Memories – Flash Program memory: 16 to 32 Kbyte Flash; data ret

STMICROELECTRONICS

意法半导体

Automotive 8-bit MCU, with up to 32 Kbyte Flash, data EEPROM, 10-bit ADC, timers, LIN, SPI, I2C, 3 to 5.5 V

Features • AEC-Q10x qualified • Core – Max fCPU: 16 MHz – Advanced STM8A core with Harvard architecture and 3-stage pipeline – Average 1.6 cycles/instruction resulting in 10 MIPS at 16 MHz fCPU for industry standard benchmark • Memories – Flash Program memory: 16 to 32 Kbyte Flash; data ret

STMICROELECTRONICS

意法半导体

Automotive 8-bit MCU, with up to 32 Kbyte Flash, data EEPROM, 10-bit ADC, timers, LIN, SPI, I2C, 3 to 5.5 V

Features • AEC-Q10x qualified • Core – Max fCPU: 16 MHz – Advanced STM8A core with Harvard architecture and 3-stage pipeline – Average 1.6 cycles/instruction resulting in 10 MIPS at 16 MHz fCPU for industry standard benchmark • Memories – Flash Program memory: 16 to 32 Kbyte Flash; data ret

STMICROELECTRONICS

意法半导体

Automotive 8-bit MCU, with up to 32 Kbyte Flash, data EEPROM, 10-bit ADC, timers, LIN, SPI, I2C, 3 to 5.5 V

Features • AEC-Q10x qualified • Core – Max fCPU: 16 MHz – Advanced STM8A core with Harvard architecture and 3-stage pipeline – Average 1.6 cycles/instruction resulting in 10 MIPS at 16 MHz fCPU for industry standard benchmark • Memories – Flash Program memory: 16 to 32 Kbyte Flash; data ret

STMICROELECTRONICS

意法半导体

Automotive 8-bit MCU, with up to 32 Kbyte Flash, data EEPROM, 10-bit ADC, timers, LIN, SPI, I2C, 3 to 5.5 V

Features • AEC-Q10x qualified • Core – Max fCPU: 16 MHz – Advanced STM8A core with Harvard architecture and 3-stage pipeline – Average 1.6 cycles/instruction resulting in 10 MIPS at 16 MHz fCPU for industry standard benchmark • Memories – Flash Program memory: 16 to 32 Kbyte Flash; data ret

STMICROELECTRONICS

意法半导体

Automotive 8-bit MCU, with up to 32 Kbyte Flash, data EEPROM, 10-bit ADC, timers, LIN, SPI, I2C, 3 to 5.5 V

Features • AEC-Q10x qualified • Core – Max fCPU: 16 MHz – Advanced STM8A core with Harvard architecture and 3-stage pipeline – Average 1.6 cycles/instruction resulting in 10 MIPS at 16 MHz fCPU for industry standard benchmark • Memories – Flash Program memory: 16 to 32 Kbyte Flash; data ret

STMICROELECTRONICS

意法半导体

Automotive 8-bit MCU, with up to 32 Kbyte Flash, data EEPROM, 10-bit ADC, timers, LIN, SPI, I2C, 3 to 5.5 V

Features • AEC-Q10x qualified • Core – Max fCPU: 16 MHz – Advanced STM8A core with Harvard architecture and 3-stage pipeline – Average 1.6 cycles/instruction resulting in 10 MIPS at 16 MHz fCPU for industry standard benchmark • Memories – Flash Program memory: 16 to 32 Kbyte Flash; data ret

STMICROELECTRONICS

意法半导体

Automotive 8-bit MCU, with up to 32 Kbyte Flash, data EEPROM, 10-bit ADC, timers, LIN, SPI, I2C, 3 to 5.5 V

Features • AEC-Q10x qualified • Core – Max fCPU: 16 MHz – Advanced STM8A core with Harvard architecture and 3-stage pipeline – Average 1.6 cycles/instruction resulting in 10 MIPS at 16 MHz fCPU for industry standard benchmark • Memories – Flash Program memory: 16 to 32 Kbyte Flash; data ret

STMICROELECTRONICS

意法半导体

Automotive 8-bit MCU, with up to 32 Kbyte Flash, data EEPROM, 10-bit ADC, timers, LIN, SPI, I2C, 3 to 5.5 V

Features • AEC-Q10x qualified • Core – Max fCPU: 16 MHz – Advanced STM8A core with Harvard architecture and 3-stage pipeline – Average 1.6 cycles/instruction resulting in 10 MIPS at 16 MHz fCPU for industry standard benchmark • Memories – Flash Program memory: 16 to 32 Kbyte Flash; data ret

STMICROELECTRONICS

意法半导体

Automotive 8-bit MCU, with up to 32 Kbyte Flash, data EEPROM, 10-bit ADC, timers, LIN, SPI, I2C, 3 to 5.5 V

Features • AEC-Q10x qualified • Core – Max fCPU: 16 MHz – Advanced STM8A core with Harvard architecture and 3-stage pipeline – Average 1.6 cycles/instruction resulting in 10 MIPS at 16 MHz fCPU for industry standard benchmark • Memories – Flash Program memory: 16 to 32 Kbyte Flash; data ret

STMICROELECTRONICS

意法半导体

Automotive 8-bit MCU, with up to 32 Kbyte Flash, data EEPROM, 10-bit ADC, timers, LIN, SPI, I2C, 3 to 5.5 V

Features • AEC-Q10x qualified • Core – Max fCPU: 16 MHz – Advanced STM8A core with Harvard architecture and 3-stage pipeline – Average 1.6 cycles/instruction resulting in 10 MIPS at 16 MHz fCPU for industry standard benchmark • Memories – Flash Program memory: 16 to 32 Kbyte Flash; data ret

STMICROELECTRONICS

意法半导体

Automotive 8-bit MCU, with up to 32 Kbyte Flash, data EEPROM, 10-bit ADC, timers, LIN, SPI, I2C, 3 to 5.5 V

Features • AEC-Q10x qualified • Core – Max fCPU: 16 MHz – Advanced STM8A core with Harvard architecture and 3-stage pipeline – Average 1.6 cycles/instruction resulting in 10 MIPS at 16 MHz fCPU for industry standard benchmark • Memories – Flash Program memory: 16 to 32 Kbyte Flash; data ret

STMICROELECTRONICS

意法半导体

Automotive 8-bit MCU, with up to 32 Kbyte Flash, data EEPROM, 10-bit ADC, timers, LIN, SPI, I2C, 3 to 5.5 V

Features • AEC-Q10x qualified • Core – Max fCPU: 16 MHz – Advanced STM8A core with Harvard architecture and 3-stage pipeline – Average 1.6 cycles/instruction resulting in 10 MIPS at 16 MHz fCPU for industry standard benchmark • Memories – Flash Program memory: 16 to 32 Kbyte Flash; data ret

STMICROELECTRONICS

意法半导体

Automotive 8-bit MCU, with up to 32 Kbyte Flash, data EEPROM, 10-bit ADC, timers, LIN, SPI, I2C, 3 to 5.5 V

Features • AEC-Q10x qualified • Core – Max fCPU: 16 MHz – Advanced STM8A core with Harvard architecture and 3-stage pipeline – Average 1.6 cycles/instruction resulting in 10 MIPS at 16 MHz fCPU for industry standard benchmark • Memories – Flash Program memory: 16 to 32 Kbyte Flash; data ret

STMICROELECTRONICS

意法半导体

Automotive 8-bit MCU, with up to 32 Kbyte Flash, data EEPROM, 10-bit ADC, timers, LIN, SPI, I2C, 3 to 5.5 V

Features • AEC-Q10x qualified • Core – Max fCPU: 16 MHz – Advanced STM8A core with Harvard architecture and 3-stage pipeline – Average 1.6 cycles/instruction resulting in 10 MIPS at 16 MHz fCPU for industry standard benchmark • Memories – Flash Program memory: 16 to 32 Kbyte Flash; data ret

STMICROELECTRONICS

意法半导体

Automotive 8-bit MCU, with up to 32 Kbyte Flash, data EEPROM, 10-bit ADC, timers, LIN, SPI, I2C, 3 to 5.5 V

Features • AEC-Q10x qualified • Core – Max fCPU: 16 MHz – Advanced STM8A core with Harvard architecture and 3-stage pipeline – Average 1.6 cycles/instruction resulting in 10 MIPS at 16 MHz fCPU for industry standard benchmark • Memories – Flash Program memory: 16 to 32 Kbyte Flash; data ret

STMICROELECTRONICS

意法半导体

Automotive 8-bit MCU, with up to 32 Kbyte Flash, data EEPROM, 10-bit ADC, timers, LIN, SPI, I2C, 3 to 5.5 V

Features • AEC-Q10x qualified • Core – Max fCPU: 16 MHz – Advanced STM8A core with Harvard architecture and 3-stage pipeline – Average 1.6 cycles/instruction resulting in 10 MIPS at 16 MHz fCPU for industry standard benchmark • Memories – Flash Program memory: 16 to 32 Kbyte Flash; data ret

STMICROELECTRONICS

意法半导体

Automotive 8-bit MCU, with up to 32 Kbyte Flash, data EEPROM, 10-bit ADC, timers, LIN, SPI, I2C, 3 to 5.5 V

Features • AEC-Q10x qualified • Core – Max fCPU: 16 MHz – Advanced STM8A core with Harvard architecture and 3-stage pipeline – Average 1.6 cycles/instruction resulting in 10 MIPS at 16 MHz fCPU for industry standard benchmark • Memories – Flash Program memory: 16 to 32 Kbyte Flash; data ret

STMICROELECTRONICS

意法半导体

Automotive 8-bit MCU, with up to 32 Kbyte Flash, data EEPROM, 10-bit ADC, timers, LIN, SPI, I2C, 3 to 5.5 V

Features • AEC-Q10x qualified • Core – Max fCPU: 16 MHz – Advanced STM8A core with Harvard architecture and 3-stage pipeline – Average 1.6 cycles/instruction resulting in 10 MIPS at 16 MHz fCPU for industry standard benchmark • Memories – Flash Program memory: 16 to 32 Kbyte Flash; data ret

STMICROELECTRONICS

意法半导体

Automotive 8-bit MCU, with up to 32 Kbyte Flash, data EEPROM, 10-bit ADC, timers, LIN, SPI, I2C, 3 to 5.5 V

Features • AEC-Q10x qualified • Core – Max fCPU: 16 MHz – Advanced STM8A core with Harvard architecture and 3-stage pipeline – Average 1.6 cycles/instruction resulting in 10 MIPS at 16 MHz fCPU for industry standard benchmark • Memories – Flash Program memory: 16 to 32 Kbyte Flash; data ret

STMICROELECTRONICS

意法半导体

Automotive 8-bit MCU, with up to 32 Kbyte Flash, data EEPROM, 10-bit ADC, timers, LIN, SPI, I2C, 3 to 5.5 V

Features • AEC-Q10x qualified • Core – Max fCPU: 16 MHz – Advanced STM8A core with Harvard architecture and 3-stage pipeline – Average 1.6 cycles/instruction resulting in 10 MIPS at 16 MHz fCPU for industry standard benchmark • Memories – Flash Program memory: 16 to 32 Kbyte Flash; data ret

STMICROELECTRONICS

意法半导体

Automotive 8-bit MCU, with up to 32 Kbyte Flash, data EEPROM, 10-bit ADC, timers, LIN, SPI, I2C, 3 to 5.5 V

Features • AEC-Q10x qualified • Core – Max fCPU: 16 MHz – Advanced STM8A core with Harvard architecture and 3-stage pipeline – Average 1.6 cycles/instruction resulting in 10 MIPS at 16 MHz fCPU for industry standard benchmark • Memories – Flash Program memory: 16 to 32 Kbyte Flash; data ret

STMICROELECTRONICS

意法半导体

Automotive 8-bit MCU, with up to 32 Kbyte Flash, data EEPROM, 10-bit ADC, timers, LIN, SPI, I2C, 3 to 5.5 V

Features • AEC-Q10x qualified • Core – Max fCPU: 16 MHz – Advanced STM8A core with Harvard architecture and 3-stage pipeline – Average 1.6 cycles/instruction resulting in 10 MIPS at 16 MHz fCPU for industry standard benchmark • Memories – Flash Program memory: 16 to 32 Kbyte Flash; data ret

STMICROELECTRONICS

意法半导体

Automotive 8-bit MCU, with up to 32 Kbyte Flash, data EEPROM, 10-bit ADC, timers, LIN, SPI, I2C, 3 to 5.5 V

Features • AEC-Q10x qualified • Core – Max fCPU: 16 MHz – Advanced STM8A core with Harvard architecture and 3-stage pipeline – Average 1.6 cycles/instruction resulting in 10 MIPS at 16 MHz fCPU for industry standard benchmark • Memories – Flash Program memory: 16 to 32 Kbyte Flash; data ret

STMICROELECTRONICS

意法半导体

Automotive 8-bit MCU, with up to 32 Kbyte Flash, data EEPROM, 10-bit ADC, timers, LIN, SPI, I2C, 3 to 5.5 V

Features • AEC-Q10x qualified • Core – Max fCPU: 16 MHz – Advanced STM8A core with Harvard architecture and 3-stage pipeline – Average 1.6 cycles/instruction resulting in 10 MIPS at 16 MHz fCPU for industry standard benchmark • Memories – Flash Program memory: 16 to 32 Kbyte Flash; data ret

STMICROELECTRONICS

意法半导体

Automotive 8-bit MCU, with up to 32 Kbyte Flash, data EEPROM, 10-bit ADC, timers, LIN, SPI, I2C, 3 to 5.5 V

Features • AEC-Q10x qualified • Core – Max fCPU: 16 MHz – Advanced STM8A core with Harvard architecture and 3-stage pipeline – Average 1.6 cycles/instruction resulting in 10 MIPS at 16 MHz fCPU for industry standard benchmark • Memories – Flash Program memory: 16 to 32 Kbyte Flash; data ret

STMICROELECTRONICS

意法半导体

Automotive 8-bit MCU, with up to 32 Kbyte Flash, data EEPROM, 10-bit ADC, timers, LIN, SPI, I2C, 3 to 5.5 V

Features • AEC-Q10x qualified • Core – Max fCPU: 16 MHz – Advanced STM8A core with Harvard architecture and 3-stage pipeline – Average 1.6 cycles/instruction resulting in 10 MIPS at 16 MHz fCPU for industry standard benchmark • Memories – Flash Program memory: 16 to 32 Kbyte Flash; data ret

STMICROELECTRONICS

意法半导体

Automotive 8-bit MCU, with up to 32 Kbyte Flash, data EEPROM, 10-bit ADC, timers, LIN, SPI, I2C, 3 to 5.5 V

Features • AEC-Q10x qualified • Core – Max fCPU: 16 MHz – Advanced STM8A core with Harvard architecture and 3-stage pipeline – Average 1.6 cycles/instruction resulting in 10 MIPS at 16 MHz fCPU for industry standard benchmark • Memories – Flash Program memory: 16 to 32 Kbyte Flash; data ret

STMICROELECTRONICS

意法半导体

STM8AF6266产品属性

  • 类型

    描述

  • 型号

    STM8AF6266

  • 制造商

    STMICROELECTRONICS

  • 制造商全称

    STMicroelectronics

  • 功能描述

    Automotive 8-bit MCU, with up to 32 Kbytes Flash, data EEPROM, 10-bit ADC, timers, LIN, SPI, I2C, 3 to 5.5 V

更新时间:2026-1-1 11:22:00
IC供应商 芯片型号 品牌 批号 封装 库存 备注 价格
ST
24+
32-LQFP
6000
全新原装深圳仓库现货有单必成
ST/意法
24+
QFP
9600
原装现货,优势供应,支持实单!
ST/意法
23+
QFP32
11200
原厂授权一级代理、全球订货优势渠道、可提供一站式BO
ST/意法
2025+
5000
原装进口,免费送样品!
ST
23+
32-LQFP
10000
正规渠道,只有原装!
ST
23+
32LQFP
8000
只做原装现货
ST(意法半导体)
2447
LQFP-32(7x7)
31500
2400个/圆盘一级代理专营品牌!原装正品,优势现货,
ST/意法
23+
QFP32
50000
全新原装正品现货,支持订货
ST(意法)
23+
NA
20094
正纳10年以上分销经验原装进口正品做服务做口碑有支持
ST
2022+
32-LQFP
7600
原厂原装,假一罚十

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