OPERATES WITH A SINGLE 3.3V SUPPLY

DESCRIPTION The STLVDS9637, is a differential line receiver that implements the electrical characteristics of low voltage differential signaling (LVDS). This signaling technique lowers the output voltage levels of 5V differential standard levels (such as TIA/EIA-422B) to reduce the power, increas

OPERATES WITH A SINGLE 3.3V SUPPLY

DESCRIPTION The STLVDS9637, is a differential line receiver that implements the electrical characteristics of low voltage differential signaling (LVDS). This signaling technique lowers the output voltage levels of 5V differential standard levels (such as TIA/EIA-422B) to reduce the power, increas

封装/外壳：8-SOIC（0.154"，3.90mm 宽） 包装：卷带（TR） 描述：IC RECEIVER 0/2 8SO 集成电路（IC） 驱动器，接收器，收发器

RS-232, #28-25c, SR-PVC, O/A FoilBraid, PVC Jkt, CL2

Product Description Computer EIA RS-232 Cable, 28 AWG stranded (7x36) tinned copper conductors, semi-rigid PVC insulation, overall Beldfoil® (100 Coverage) + tinned copper braid shield (65 Coverage), PVC jacket.

Octal, 12-Bit, 40/80 MSPS, Serial LVDS

GENERAL DESCRIPTION The AD9637 is an octal, 12-bit, 40/80 MSPS analog-to-digital converter (ADC) with an on-chip sample-and-hold circuit designed for low cost, low power, small size, and ease of use. The product operates at a conversion rate of up to 80 MSPS and is optimized for outstanding dynam

1.8 V Analog-to-Digital Converter

文件：1.01262 Mbytes Page：41 Pages

Dual Differential Line Receiver

文件：142.33 Kbytes Page：6 Pages

Dual Differential Line Receiver

文件：310.29 Kbytes Page：8 Pages