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SN74LVC74APWR价格
参考价格：￥0.5174
型号：SN74LVC74APWR 品牌：TI 备注：这里有SN74LVC74APWR多少钱，2025年最近7天走势，今日出价，今日竞价，SN74LVC74APWR批发/采购报价，SN74LVC74APWR行情走势销售排行榜，SN74LVC74APWR报价。| 型号 | 功能描述 | 生产厂家&企业 | LOGO | 操作 |
|---|---|---|---|---|
SN74LVC74APWR | SNx4LVC74A Dual Positive-Edge-Triggered D-Type Flip-Flops With Clear and Preset 1 Features • Operate from 1.65V to 3.6V • Inputs accept voltages to 5.5V • Maximum tpd of 5.2ns at 3.3V • Typical VOLP (output ground bounce) 2V at VCC = 3.3V, TA = 25°C • Latch-up performance exceeds 250mA per JESD 17 | TI1 德州仪器 |   | |
SN74LVC74APWR | SNx4LVC74A Dual Positive-Edge-Triggered D-Type Flip-Flops With Clear and Preset 1 Features • Operate from 1.65V to 3.6V • Inputs accept voltages to 5.5V • Maximum tpd of 5.2ns at 3.3V • Typical VOLP (output ground bounce) 2V at VCC = 3.3V, TA = 25°C • Latch-up performance exceeds 250mA per JESD 17 | TI2 德州仪器 | | |
SN74LVC74APWR | 封装/外壳：14-TSSOP（0.173"，4.40mm 宽） 功能：设置（预设）和复位 包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 描述：IC FF D-TYPE DUAL 1BIT 14TSSOP 集成电路（IC） 触发器 | TI2 德州仪器 | | |
SN74LVC74APWR | DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET 文件：814.84 Kbytes Page：19 Pages | TI 德州仪器 | | |
SN74LVC74APWR | DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET 文件：516.539 Kbytes Page：17 Pages | TI 德州仪器 | | |
SN74LVC74APWR | DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET 文件：661.44 Kbytes Page：19 Pages | TI 德州仪器 | | |
SN74LVC74APWR | DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET 文件：1.2074 Mbytes Page：27 Pages | TI1 德州仪器 | | |
SNx4LVC74A Dual Positive-Edge-Triggered D-Type Flip-Flops With Clear and Preset 1 Features • Operate from 1.65V to 3.6V • Inputs accept voltages to 5.5V • Maximum tpd of 5.2ns at 3.3V • Typical VOLP (output ground bounce) 2V at VCC = 3.3V, TA = 25°C • Latch-up performance exceeds 250mA per JESD 17 | TI2 德州仪器 | | ||
SNx4LVC74A Dual Positive-Edge-Triggered D-Type Flip-Flops With Clear and Preset 1 Features • Operate from 1.65V to 3.6V • Inputs accept voltages to 5.5V • Maximum tpd of 5.2ns at 3.3V • Typical VOLP (output ground bounce) 2V at VCC = 3.3V, TA = 25°C • Latch-up performance exceeds 250mA per JESD 17 | TI2 德州仪器 | | ||
SNx4LVC74A Dual Positive-Edge-Triggered D-Type Flip-Flops With Clear and Preset 1 Features • Operate from 1.65V to 3.6V • Inputs accept voltages to 5.5V • Maximum tpd of 5.2ns at 3.3V • Typical VOLP (output ground bounce) 2V at VCC = 3.3V, TA = 25°C • Latch-up performance exceeds 250mA per JESD 17 | TI1 德州仪器 | | ||
SNx4LVC74A Dual Positive-Edge-Triggered D-Type Flip-Flops With Clear and Preset 1 Features • Operate from 1.65V to 3.6V • Inputs accept voltages to 5.5V • Maximum tpd of 5.2ns at 3.3V • Typical VOLP (output ground bounce) 2V at VCC = 3.3V, TA = 25°C • Latch-up performance exceeds 250mA per JESD 17 | TI1 德州仪器 | | ||
SNx4LVC74A Dual Positive-Edge-Triggered D-Type Flip-Flops With Clear and Preset 1 Features • Operate from 1.65V to 3.6V • Inputs accept voltages to 5.5V • Maximum tpd of 5.2ns at 3.3V • Typical VOLP (output ground bounce) 2V at VCC = 3.3V, TA = 25°C • Latch-up performance exceeds 250mA per JESD 17 | TI2 德州仪器 | | ||
SNx4LVC74A Dual Positive-Edge-Triggered D-Type Flip-Flops With Clear and Preset 1 Features • Operate from 1.65V to 3.6V • Inputs accept voltages to 5.5V • Maximum tpd of 5.2ns at 3.3V • Typical VOLP (output ground bounce) 2V at VCC = 3.3V, TA = 25°C • Latch-up performance exceeds 250mA per JESD 17 | TI2 德州仪器 | | ||
DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET 文件：661.44 Kbytes Page：19 Pages | TI 德州仪器 | | ||
DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET 文件：1.2074 Mbytes Page：27 Pages | TI1 德州仪器 | | ||
DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET 文件：814.84 Kbytes Page：19 Pages | TI 德州仪器 | | ||
DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET 文件：516.539 Kbytes Page：17 Pages | TI 德州仪器 | | ||
DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET 文件：661.44 Kbytes Page：19 Pages | TI 德州仪器 | | ||
DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET 文件：1.2074 Mbytes Page：27 Pages | TI1 德州仪器 | | ||
DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET 文件：516.539 Kbytes Page：17 Pages | TI 德州仪器 | | ||
DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET 文件：661.44 Kbytes Page：19 Pages | TI 德州仪器 | | ||
DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET 文件：814.84 Kbytes Page：19 Pages | TI 德州仪器 | | ||
封装/外壳：14-TSSOP（0.173"，4.40mm 宽） 功能：设置（预设）和复位 包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 描述：IC FF D-TYPE DUAL 1BIT 14TSSOP 集成电路（IC） 触发器 | TI2 德州仪器 | | ||
Dual D-type flip-flop with set and reset; positive-edge trigger | ETC 知名厂家 | ETC | | |
Dual D-type flip-flop with set and reset; positive-edge trigger DESCRIPTION The 74LVC74A is a high-performance, low-voltage Si-gate CMOS device and superior to most advanced CMOS compatible TTL families. FEATURES •Wide supply voltage range of 1.2 V to 3.6 V •In accordance with JEDEC standard no. 8-1A. •Inputs accept voltages up to 5.5 V •CMOS low power c | Philips 飞利浦 | | ||
Dual D-type flip-flop with set and reset; positive-edge trigger 1. General description The 74LVC74A is a dual edge triggered D-type flip-flop with individual data (nD) inputs, clock (nCP) inputs, set (nSD) and (nRD) inputs, and complementary nQ and nQ outputs. The set and reset are asynchronous active LOW inputs and operate independently of the clock input | NEXPERIANexperia B.V. All rights reserved 安世安世半导体(中国)有限公司 | | ||
Dual D-type flip-flop with set and reset; positive-edge trigger 1. General description The 74LVC74A is a dual edge triggered D-type flip-flop with individual data (nD) inputs, clock (nCP) inputs, set (nSD) and (nRD) inputs, and complementary nQ and nQ outputs. The set and reset are asynchronous active LOW inputs and operate independently of the clock input | NEXPERIANexperia B.V. All rights reserved 安世安世半导体(中国)有限公司 | | ||
Dual D-type flip-flop with set and reset; positive-edge trigger | ETC 知名厂家 | ETC | |
SN74LVC74APWR产品属性
- 类型
描述
- 型号
SN74LVC74APWR
- 功能描述
触发器 Tri-State Dual
- RoHS
否
- 制造商
Texas Instruments
- 电路数量
2
- 逻辑系列
SN74
- 逻辑类型
D-Type Flip-Flop
- 极性
Inverting, Non-Inverting
- 输入类型
CMOS
- 传播延迟时间
4.4 ns
- 高电平输出电流
- 16 mA
- 低电平输出电流
16 mA
- 电源电压-最大
5.5 V
- 最大工作温度
+ 85 C
- 安装风格
SMD/SMT
- 封装/箱体
X2SON-8
- 封装
Reel
| IC供应商 | 芯片型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
|---|---|---|---|---|---|---|---|
TI/TEXAS |
23+ |
TSSOP?(PW)|1 |
8931 |
||||
TI/德州仪器 |
24+ |
TSSOP14 |
8950 |
BOM配单专家,发货快,价格低 |
|||
TI |
09+ |
TSSOP14 |
5500 |
原装无铅,优势热卖 |
|||
TI |
23+ |
SOP |
5500 |
现货,全新原装 |
|||
TI/德州仪器 |
20+ |
TSSOP-14 |
6000 |
全新原装 |
|||
TI |
24+ |
TSSOP-14 |
22530 |
公司全新原装现货/随时可以发货! |
|||
TI(德州仪器) |
24+ |
TSSOP-14 |
9048 |
原厂可订货,技术支持,直接渠道。可签保供合同 |
|||
TI |
24+ |
5000 |
自己现货 |
||||
TI |
20+ |
原厂封装 |
6965 |
英卓尔原装现货!0755-82566558真实库存! |
|||
TI/德州仪器 |
23+/24+ |
TSSOP |
9865 |
主营TI/德州仪器.原包原盒.支持实单 |
SN74LVC74APWR芯片相关品牌
SN74LVC74APWR规格书下载地址
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DdatasheetPDF页码索引
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