OCTAL BUS TRANSCEIVER AND REGISTER WITH 3-STATE OUTPUTS

FEATURES · Operates From 1.65 V to 3.6 V · Inputs Accept Voltages to 5.5 V · Max tpd of 8.2 ns at 3.3 V · Typical VOLP (Output Ground Bounce) 2 V at VCC = 3.3 V, TA = 25°C · Supports Mixed-Mode Signal Operation on All

Octal registered tranceiver with 5-volt tolerant inputs/ouputs 3-State

DESCRIPTION The 74LVC2952A is a low-power, low-voltage, Si-gate CMOS device and superior to most advanced CMOS compatible TTL families. The 74LVC2952A is an octal non-inverting registered transceiver. Two 8-bit back to back registers store data flowing in both directions between two bidirectional

Octal registered tranceiver with 5-volt tolerant inputs/ouputs 3-State

DESCRIPTION The 74LVC2952A is a low-power, low-voltage, Si-gate CMOS device and superior to most advanced CMOS compatible TTL families. The 74LVC2952A is an octal non-inverting registered transceiver. Two 8-bit back to back registers store data flowing in both directions between two bidirectional

Octal registered tranceiver with 5-volt tolerant inputs/ouputs 3-State

DESCRIPTION The 74LVC2952A is a low-power, low-voltage, Si-gate CMOS device and superior to most advanced CMOS compatible TTL families. The 74LVC2952A is an octal non-inverting registered transceiver. Two 8-bit back to back registers store data flowing in both directions between two bidirectional

Octal registered tranceiver with 5-volt tolerant inputs/ouputs 3-State

DESCRIPTION The 74LVC2952A is a low-power, low-voltage, Si-gate CMOS device and superior to most advanced CMOS compatible TTL families. The 74LVC2952A is an octal non-inverting registered transceiver. Two 8-bit back to back registers store data flowing in both directions between two bidirectional

Octal registered tranceiver with 5-volt tolerant inputs/ouputs 3-State

DESCRIPTION The 74LVC2952A is a low-power, low-voltage, Si-gate CMOS device and superior to most advanced CMOS compatible TTL families. The 74LVC2952A is an octal non-inverting registered transceiver. Two 8-bit back to back registers store data flowing in both directions between two bidirectional