SN74LVC1G175 Single D-Type Flip-Flop With Asynchronous Clear

1 Features 1• Available in the Texas Instruments NanoFree™ Package • Supports 5-V VCC Operation • Inputs Accept Voltages to 5.5 V • Supports Down Translation to VCC • Max tpd of 4.3 ns at 3.3 V • Low Power Consumption, 10-μA Max ICC • ±24-mA Output Drive at 3.3 V • Ioff Supports Live Inse

具有异步清零功能的增强型产品单路 D 型触发器

This single D-type flip-flop is designed for 1.65-V to 5.5-V VCC operation. The SN74LVC1G175 has an asynchronous clear (CLR) input. When CLR is high, data from the input pin (D) is transferred to the output pin (Q) on the clock’s (CLK) rising edge. When CLR is low, Q is forced into the low state, re • Supports 5-V VCC Operation\n• Max tpd of 4.3 ns at 3.3 V\n• ±24-mA Output Drive at 3.3 V\n• Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II\n• 2000-V Human-Body Model (A114-A)\n• 1000-V Charged-Device Model (C101)\n• APPLICATIONS \n• One Assembly/Test Site\n• Available in Military (–55°C;

SINGLE D-TYPE FLIP-FLOP WITH ASYNCHRONOUS CLEAR

文件：545.67 Kbytes Page：14 Pages

SINGLE D-TYPE DFLIP FLOP WITH ASYNCHRONOUS CLEAR

文件：226.73 Kbytes Page：12 Pages

SINGLE D-TYPE DFLIP FLOP WITH ASYNCHRONOUS CLEAR

文件：226.73 Kbytes Page：12 Pages

SINGLE D-TYPE DFLIP FLOP WITH ASYNCHRONOUS CLEAR

文件：226.73 Kbytes Page：12 Pages

SINGLE D-TYPE DFLIP FLOP WITH ASYNCHRONOUS CLEAR

文件：226.73 Kbytes Page：12 Pages

SINGLE D-TYPE DFLIP FLOP WITH ASYNCHRONOUS CLEAR

文件：226.73 Kbytes Page：12 Pages