SINGLE BUS BUFFER GATE WITH 3-STATE OUTPUTS

文件：119.99 Kbytes Page：8 Pages

SN74LVC1G125 Single Bus Buffer Gate With 3-State Output

1 Features 1• Available in the Ultra Small 0.64-mm2 Package (DPW) With 0.5-mm Pitch • Supports 5-V VCC Operation • Inputs Accept Voltages to 5.5 V • Provides Down Translation to VCC • Max t pd of 3.7 ns at 3.3 V • Low Power Consumption, 10-μA Max ICC • ±24-mA Output Drive at 3.3 V • Ioff S

SN74LVC1G125 Single Bus Buffer Gate With 3-State Output

1 Features 1• Available in the Ultra Small 0.64-mm2 Package (DPW) With 0.5-mm Pitch • Supports 5-V VCC Operation • Inputs Accept Voltages to 5.5 V • Provides Down Translation to VCC • Max t pd of 3.7 ns at 3.3 V • Low Power Consumption, 10-μA Max ICC • ±24-mA Output Drive at 3.3 V • Ioff S

SN74LVC1G125 Single Bus Buffer Gate With 3-State Output

1 Features 1• Available in the Ultra Small 0.64-mm2 Package (DPW) With 0.5-mm Pitch • Supports 5-V VCC Operation • Inputs Accept Voltages to 5.5 V • Provides Down Translation to VCC • Max t pd of 3.7 ns at 3.3 V • Low Power Consumption, 10-μA Max ICC • ±24-mA Output Drive at 3.3 V • Ioff S

SN74LVC1G125 Single Bus Buffer Gate With 3-State Output

1 Features 1• Available in the Ultra Small 0.64-mm2 Package (DPW) With 0.5-mm Pitch • Supports 5-V VCC Operation • Inputs Accept Voltages to 5.5 V • Provides Down Translation to VCC • Max t pd of 3.7 ns at 3.3 V • Low Power Consumption, 10-μA Max ICC • ±24-mA Output Drive at 3.3 V • Ioff S

SN74LVC1G125 Single Bus Buffer Gate With 3-State Output

1 Features 1• Available in the Ultra Small 0.64-mm2 Package (DPW) With 0.5-mm Pitch • Supports 5-V VCC Operation • Inputs Accept Voltages to 5.5 V • Provides Down Translation to VCC • Max t pd of 3.7 ns at 3.3 V • Low Power Consumption, 10-μA Max ICC • ±24-mA Output Drive at 3.3 V • Ioff S

SN74LVC1G125 Single Bus Buffer Gate With 3-State Output

1 Features 1• Available in the Ultra Small 0.64-mm2 Package (DPW) With 0.5-mm Pitch • Supports 5-V VCC Operation • Inputs Accept Voltages to 5.5 V • Provides Down Translation to VCC • Max t pd of 3.7 ns at 3.3 V • Low Power Consumption, 10-μA Max ICC • ±24-mA Output Drive at 3.3 V • Ioff S

Designed for 1.65V to 5.5V VCC Operation

General Description The SN74LVC1G125 is a high performance non−inverting buffer operating from a 1.65V to 5.5V supply. This device is fabricated with advanced CMOS technology to achieve ultra-high speed with high output drive. Features ● Designed for 1.65V to 5.5V VCC Operation ● Overvol

SN74LVC1G125 Single Bus Buffer Gate With 3-State Output

1 Features 1• Available in the Ultra Small 0.64-mm2 Package (DPW) With 0.5-mm Pitch • Supports 5-V VCC Operation • Inputs Accept Voltages to 5.5 V • Provides Down Translation to VCC • Max t pd of 3.7 ns at 3.3 V • Low Power Consumption, 10-μA Max ICC • ±24-mA Output Drive at 3.3 V • Ioff S

SN74LVC1G125 Single Bus Buffer Gate With 3-State Output

1 Features 1• Available in the Ultra Small 0.64-mm2 Package (DPW) With 0.5-mm Pitch • Supports 5-V VCC Operation • Inputs Accept Voltages to 5.5 V • Provides Down Translation to VCC • Max t pd of 3.7 ns at 3.3 V • Low Power Consumption, 10-μA Max ICC • ±24-mA Output Drive at 3.3 V • Ioff S

SN74LVC1G125 Single Bus Buffer Gate With 3-State Output

1 Features 1• Available in the Ultra Small 0.64-mm2 Package (DPW) With 0.5-mm Pitch • Supports 5-V VCC Operation • Inputs Accept Voltages to 5.5 V • Provides Down Translation to VCC • Max t pd of 3.7 ns at 3.3 V • Low Power Consumption, 10-μA Max ICC • ±24-mA Output Drive at 3.3 V • Ioff S

SN74LVC1G125 Single Bus Buffer Gate With 3-State Output

1 Features 1• Available in the Ultra Small 0.64-mm2 Package (DPW) With 0.5-mm Pitch • Supports 5-V VCC Operation • Inputs Accept Voltages to 5.5 V • Provides Down Translation to VCC • Max t pd of 3.7 ns at 3.3 V • Low Power Consumption, 10-μA Max ICC • ±24-mA Output Drive at 3.3 V • Ioff S

SN74LVC1G125 Single Bus Buffer Gate With 3-State Output

1 Features 1• Available in the Ultra Small 0.64-mm2 Package (DPW) With 0.5-mm Pitch • Supports 5-V VCC Operation • Inputs Accept Voltages to 5.5 V • Provides Down Translation to VCC • Max t pd of 3.7 ns at 3.3 V • Low Power Consumption, 10-μA Max ICC • ±24-mA Output Drive at 3.3 V • Ioff S

SN74LVC1G125 Single Bus Buffer Gate With 3-State Output

1 Features 1• Available in the Ultra Small 0.64-mm2 Package (DPW) With 0.5-mm Pitch • Supports 5-V VCC Operation • Inputs Accept Voltages to 5.5 V • Provides Down Translation to VCC • Max t pd of 3.7 ns at 3.3 V • Low Power Consumption, 10-μA Max ICC • ±24-mA Output Drive at 3.3 V • Ioff S

SN74LVC1G125 Single Bus Buffer Gate With 3-State Output

1 Features 1• Available in the Ultra Small 0.64-mm2 Package (DPW) With 0.5-mm Pitch • Supports 5-V VCC Operation • Inputs Accept Voltages to 5.5 V • Provides Down Translation to VCC • Max t pd of 3.7 ns at 3.3 V • Low Power Consumption, 10-μA Max ICC • ±24-mA Output Drive at 3.3 V • Ioff S

SN74LVC1G125 Single Bus Buffer Gate With 3-State Output

1 Features 1• Available in the Ultra Small 0.64-mm2 Package (DPW) With 0.5-mm Pitch • Supports 5-V VCC Operation • Inputs Accept Voltages to 5.5 V • Provides Down Translation to VCC • Max t pd of 3.7 ns at 3.3 V • Low Power Consumption, 10-μA Max ICC • ±24-mA Output Drive at 3.3 V • Ioff S

Single Bus Buffer Gate With 3-State Output

文件：2.77278 Mbytes Page：43 Pages

Single Bus Buffer Gate With 3-State Output

文件：2.77278 Mbytes Page：43 Pages

SN74LVC1G125 Single Bus Buffer Gate With 3-State Output

文件：1.7749 Mbytes Page：37 Pages

封装/外壳：5-TSSOP，SC-70-5，SOT-353 包装：卷带（TR） 描述：IC BUF NON-INVERT 5.5V SC70-5 集成电路（IC） 缓冲器，驱动器，接收器，收发器

封装/外壳：5-TSSOP，SC-70-5，SOT-353 包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 描述：IC BUF NON-INVERT 5.5V SC70-5 集成电路（IC） 缓冲器，驱动器，接收器，收发器

SN74LVC1G125 Single Bus Buffer Gate With 3-State Output

文件：1.7749 Mbytes Page：37 Pages

Single Bus Buffer Gate With 3-State Output

文件：2.77278 Mbytes Page：43 Pages

SINGLE BUS BUFFER GATE WITH 3-STATE OUTPUT

文件：630.09 Kbytes Page：18 Pages

SINGLE BUS BUFFER GATE WITH 3-STATE OUTPUT

文件：738.1 Kbytes Page：19 Pages

SINGLE BUS BUFFER GATE WITH 3-STATE OUTPUT

文件：738.37 Kbytes Page：19 Pages

SINGLE BUS BUFFER GATE WITH 3-STATE OUTPUT

文件：738.37 Kbytes Page：19 Pages

SINGLE BUS BUFFER GATE WITH 3-STATE OUTPUT

文件：630.09 Kbytes Page：18 Pages

SINGLE BUS BUFFER GATE WITH 3-STATE OUTPUT

文件：738.1 Kbytes Page：19 Pages

Single Bus Buffer Gate With 3-State Output

文件：2.77278 Mbytes Page：43 Pages

SN74LVC1G125 Single Bus Buffer Gate With 3-State Output

文件：1.7749 Mbytes Page：37 Pages

Bus buffer/line driver; 3-state

DESCRIPTION The 74LVC1G125 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. The input can be driven from either 3.3 V or 5 V devices. This feature allows the use of this device in a mixed 3.3 V and 5 V environment. FEAT

Bus buffer/line driver; 3-state

SINGLE BUS BUFFER GATE WITH 3-STATE OUTPUTS

文件：119.99 Kbytes Page：8 Pages

SINGLE BUFFER GATE WITH 3-STATE OUTPUT

文件：268.78 Kbytes Page：14 Pages

Bus buffer/line driver; 3-state