丝印代码：C005；SN74LVC1G00 Single 2-Input Positive-NAND Gate

1 Features 1• Available in the Ultra Small 0.64-mm2 Package (DPW) With 0.5-mm Pitch • Supports 5-V VCC Operation • Inputs Accept Voltages to 5.5 V • Provides Down Translation to VCC • Max t pd of 3.8 ns at 3.3 V • Low Power Consumption, 10-μA Max ICC • ±24-mA Output Drive at 3.3 V • Ioff S

SN74LVC1G00_16

文件：1.74036 Mbytes Page：36 Pages

封装/外壳：SC-74A，SOT-753 包装：管件 描述：IC GATE NAND 1CH 2-INP SOT23-5 集成电路（IC） 门和反相器

SINGLE 2-INPUT POSITIVE-NAND GATE

文件：668.03 Kbytes Page：16 Pages

SINGLE 2-INPUT POSITIVE-NAND GATE

文件：667.47 Kbytes Page：16 Pages

SINGLE 2-INPUT POSITIVE-NAND GATE

文件：443.54 Kbytes Page：17 Pages

丝印代码：C005；SN74LVC1G00 Single 2-Input Positive-NAND Gate

1 Features 1• Available in the Ultra Small 0.64-mm2 Package (DPW) With 0.5-mm Pitch • Supports 5-V VCC Operation • Inputs Accept Voltages to 5.5 V • Provides Down Translation to VCC • Max t pd of 3.8 ns at 3.3 V • Low Power Consumption, 10-μA Max ICC • ±24-mA Output Drive at 3.3 V • Ioff S

丝印代码：C00F；SN74LVC1G00 Single 2-Input Positive-NAND Gate

1 Features 1• Available in the Ultra Small 0.64-mm2 Package (DPW) With 0.5-mm Pitch • Supports 5-V VCC Operation • Inputs Accept Voltages to 5.5 V • Provides Down Translation to VCC • Max t pd of 3.8 ns at 3.3 V • Low Power Consumption, 10-μA Max ICC • ±24-mA Output Drive at 3.3 V • Ioff S

丝印代码：C00F；SN74LVC1G00 Single 2-Input Positive-NAND Gate

1 Features 1• Available in the Ultra Small 0.64-mm2 Package (DPW) With 0.5-mm Pitch • Supports 5-V VCC Operation • Inputs Accept Voltages to 5.5 V • Provides Down Translation to VCC • Max t pd of 3.8 ns at 3.3 V • Low Power Consumption, 10-μA Max ICC • ±24-mA Output Drive at 3.3 V • Ioff S

SN74LVC1G00 Single 2-Input Positive-NAND Gate

1 Features 1• Available in the Ultra Small 0.64-mm2 Package (DPW) With 0.5-mm Pitch • Supports 5-V VCC Operation • Inputs Accept Voltages to 5.5 V • Provides Down Translation to VCC • Max t pd of 3.8 ns at 3.3 V • Low Power Consumption, 10-μA Max ICC • ±24-mA Output Drive at 3.3 V • Ioff S

SINGLE 2-INPUT POSITIVE-NAND GATE

文件：668.03 Kbytes Page：16 Pages

SN74LVC1G00_16

文件：1.74036 Mbytes Page：36 Pages

SINGLE 2-INPUT POSITIVE-NAND GATE

文件：667.47 Kbytes Page：16 Pages

SINGLE 2-INPUT POSITIVE-NAND GATE

文件：667.47 Kbytes Page：16 Pages

SINGLE 2-INPUT POSITIVE-NAND GATE

文件：668.03 Kbytes Page：16 Pages

SN74LVC1G00_16

文件：1.74036 Mbytes Page：36 Pages

封装/外壳：SC-74A，SOT-753 包装：卷带（TR） 描述：IC GATE NAND 1CH 2-INP SOT23-5 集成电路（IC） 门和反相器

Single 2-input NAND gate

DESCRIPTION The 74LVC1G00 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. Input can be driven from either 3.3 V or 5 V devices. These features allow the use of these devices in a mixed 3.3 V and 5 V environment. Schm

SINGLE 2 INPUT POSITIVE NAND GATE

Description The 74LVC1G00 is a single 2-input positive NAND gate with a standard totem pole output. The device is designed for operation with a power supply range of 1.65V to 5.5V. The inputs are tolerant to 5.5V allowing this device to be used in a mixed voltage environment. The device is full

SINGLE 2 INPUT POSITIVE NAND GATE

文件：245.73 Kbytes Page：14 Pages

Single 2-input NAND gate

文件：123.76 Kbytes Page：17 Pages

Single 2-input NAND gate