SN74LVC138A 3-Line to 8-Line Decoders Demultiplexers

1 Features 1• Operate From 1.65 V to 3.6 V • Inputs Accept Voltages to 5.5 V • Max tpd of 5.8 ns at 3.3 V • Typical VOLP (Output Ground Bounce) 2 V at VCC = 3.3 V, TA = 25°C • Latch-Up Performance Exceeds 250 mA Per

封装/外壳：16-UFQFN 包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 描述：IC DECODER/DEMUX 1X3:8 16UQFN 集成电路（IC） 信号开关，多路复用器，解码器

3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS

文件：1.45466 Mbytes Page：34 Pages

3-to-8 line decoder/demultiplexer; inverting

1. General description The 74LVC138A decodes three binary weighted address inputs (A0, A1 and A2) to eight mutually exclusive outputs (Y0 to Y7). The 74LVC138A features three enable inputs (E1, E2 and E3). Every output will be HIGH unless E1 and E2 are LOW and E3 is HIGH. This multiple enable f

3-to-8 line decoder/demultiplexer; inverting

DESCRIPTION The 74LVC138A is a low-voltage, low-power, high-performance Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. FEATURES • Wide supply voltage range of 1.2 to 3.6 V • In accordance with JEDEC standard no. 8-1A • Inputs accept voltages up to 5.5 V • CMOS l

3-to-8 line decoder/demultiplexer; inverting

1. General description The 74LVC138A decodes three binary weighted address inputs (A0, A1 and A2) to eight mutually exclusive outputs (Y0 to Y7). The 74LVC138A features three enable inputs (E1, E2 and E3). Every output will be HIGH unless E1 and E2 are LOW and E3 is HIGH. This multiple enable f

3-to-8 line decoder/demultiplexer; inverting

DESCRIPTION The 74LVC138A is a low-voltage, low-power, high-performance Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. FEATURES • Wide supply voltage range of 1.2 to 3.6 V • In accordance with JEDEC standard no. 8-1A • Inputs accept voltages up to 5.5 V • CMOS l

3-to-8 line decoder/demultiplexer; inverting

文件：184.85 Kbytes Page：16 Pages