丝印代码：LV14AEP；HEX SCHMITT-TRIGGER INVERTER

FEATURES · Controlled Baseline – One Assembly/Test Site, One Fabrication Site · Extended Temperature Performance of –55°C to 125°C · Enhanced Diminishing Manufacturing Sources (DMS) Support · Enhanced Product-Change Notification · Qualification Pedigree (1) · Typical VOLP (Output Ground

封装/外壳：14-TSSOP（0.173"，4.40mm 宽） 包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 描述：IC INVERTER 6CH 1-INP 14TSSOP 集成电路（IC） 门和反相器

HEX SCHMITT-TRIGGER INVERTER

文件：569.46 Kbytes Page：15 Pages

封装/外壳：14-TSSOP（0.173"，4.40mm 宽） 包装：卷带（TR） 描述：IC INVERTER 6CH 1-INP 14TSSOP 集成电路（IC） 门和反相器

HEX SCHMITT-TRIGGER INVERTER

文件：569.46 Kbytes Page：15 Pages

Hex inverting Schmitt-trigger

DESCRIPTION The 74LV14 is a low-voltage Si-gate CMOS device and is pin and function compatible with 74HC/HCT14. The 74LV14 provides six inverting buffers with Schmitt-trigger action. It is capable of transforming slowly changing input signals into sharply defined, jitter-free output signals. FE

Hex inverting Schmitt trigger

1. General description The 74LV14 is a low-voltage Si-gate CMOS device that is pin and function compatible with 74HC14 and 74HCT14. The 74LV14 provides six inverting buffers with Schmitt-trigger input. It is capable of transforming slowly-changing input signals into sharply defined, jitter-fre

Hex inverting Schmitt trigger

1. General description The 74LV14A is a hex inverter with Schmitt-trigger inputs, capable of transforming slowly changing input signals into sharply defined, jitter-free output signals. Inputs are overvoltage tolerant. This feature allows the use of these devices as translators in mixed voltag

HEX SCHMITT-TRIGGER INVERTERS

文件：647.1 Kbytes Page：16 Pages

HEX INVERTERS WITH SCHMITT TRIGGER INPUTS

文件：285.14 Kbytes Page：9 Pages