OCTAL BUS TRANSCEIVERS

Bidirectional Bus Transceivers in High-Density 20-Pin Packages Local Bus-Latch Capability Hysteresis at Bus Inputs Improves Noise Margins Choice of True or inverting Logic Choice of 3-State or Open-Collector Outputs DEVICE ouTPuT LoGic 'LS620 3-Stata Inverting ‘L621 Open-Collector

OCTAL BUS TRANSCEIVERS

文件：284.49 Kbytes Page：8 Pages

OCTAL BUS TRANSCEIVERS

文件：511.05 Kbytes Page：10 Pages

OCTAL BUS TRANSCEIVERS

文件：511.05 Kbytes Page：10 Pages

封装/外壳：20-SOIC（0.209"，5.30mm 宽） 包装：管件 描述：IC TXRX NON-INVERT 5.25V 20SO 集成电路（IC） 缓冲器，驱动器，接收器，收发器

封装/外壳：20-SOIC（0.209"，5.30mm 宽） 包装：卷带（TR） 描述：IC TXRX NON-INVERT 5.25V 20SO 集成电路（IC） 缓冲器，驱动器，接收器，收发器

OCTAL BUS TRANSCEIVER WITH 3-STATE OUTPUT

OCTAL BUS TRANSCEIVER WITH 3-STATE OUTPUT The SN54/74LS623 series is an octal bus transceiver designed for asynchronous two-way communication between data buses. Control function implementation allows maximum timing flexibility. Enable inputs may be used to disable the device so that buses are ef

OCTAL BUS TRANSCEIVERS

文件：284.49 Kbytes Page：8 Pages