DUAL 4-BIT BINARY COUNTERS

Wide Operating Voltage Range of 2 V to 6 V Outputs Can Drive Up To 10 LSTTL Loads Low Power Consumption, 80-μA Max ICC Typical tpd = 13 ns ±4-mA Output Drive at 5 V Low Input Current of 1 μA Max Dual 4-Bit Binary Counters With Individual Clocks Direct Clear for Each 4-Bit Counter

SNx4HC393 Dual 4-Bit Binary Counters

1 Features • Wide operating voltage range of 2V to 6V • Outputs can drive up to 10 LSTTL loads • Low power consumption: 80μA max ICC • Typical tpd = 13ns • ±4mA output drive at 5V • Low input current of 1μA max • Dual 4-bit binary counters with individual clocks • Direct clear for each 4-b

SNx4HC393 Dual 4-Bit Binary Counters

1 Features • Wide operating voltage range of 2V to 6V • Outputs can drive up to 10 LSTTL loads • Low power consumption: 80μA max ICC • Typical tpd = 13ns • ±4mA output drive at 5V • Low input current of 1μA max • Dual 4-bit binary counters with individual clocks • Direct clear for each 4-b

封装/外壳：14-SOIC（0.209"，5.30mm 宽） 包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 描述：IC COUNTER BIN 4BIT DUAL 14SO 集成电路（IC） 计数器，除法器

DUAL 4-BIT BINARY COUNTERS

文件：1.14004 Mbytes Page：22 Pages

DUAL 4-BIT BINARY COUNTERS

文件：542.39 Kbytes Page：17 Pages

DUAL 4-BIT BINARY COUNTERS

文件：612.07 Kbytes Page：21 Pages

DUAL 4-BIT BINARY COUNTERS

文件：612.07 Kbytes Page：21 Pages

DUAL 4-BIT BINARY COUNTERS

文件：542.39 Kbytes Page：17 Pages

DUAL 4-BIT BINARY COUNTERS

文件：1.14004 Mbytes Page：22 Pages

DUAL 4-BIT BINARY COUNTERS

文件：612.07 Kbytes Page：21 Pages

Dual 4-bit binary ripple counter

GENERAL DESCRIPTION The 74HC/HCT393 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT393 are 4-bit binary ripple counters with separate clocks (1CP and 2 CP) and master reset (

DUAL 4-BIT BINARY RIPPLE COUNTER

Dual 4-bit binary ripple counter

1. General description The 74HC393; 74HCT393 is a dual 4-stage binary ripple counter. Each counter features a clock input (nCP), an overriding asynchronous master reset input (nMR) and 4 buffered parallel outputs (nQ0 to nQ3). The counter advances on the HIGH-to-LOW transition of nCP. A HIGH on

Dual 4-bit binary ripple counter

High Speed CMOS Logic

文件：456.32 Kbytes Page：6 Pages