3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS

文件：142.46 Kbytes Page：5 Pages

3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS

文件：145.93 Kbytes Page：5 Pages

3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS

3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS

文件：142.46 Kbytes Page：5 Pages

3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS

文件：142.46 Kbytes Page：5 Pages

3-to-8 line decoder/demultiplexer

GENERAL DESCRIPTION The 74HC/HCT238 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • Demultiplexing capability • Multiple input enable for easy expansion • Ideal for mem

3-to-8 line decoder/demultiplexer

3-to-8 line decoder/demultiplexer

1. General description The 74HC238; 74HCT238 decodes three binary weighted address inputs (A0, A1 and A2) to eight mutually exclusive outputs (Y0 to Y7). The device features three enable inputs (E1 and E2 and E3). Every output will be LOW unless E1 and E2 are LOW and E3 is HIGH. This multiple e

3-to-8 line decoder/demultiplexer

1. General description The 74HC238; 74HCT238 decodes three binary weighted address inputs (A0, A1 and A2) to eight mutually exclusive outputs (Y0 to Y7). The device features three enable inputs (E1 and E2 and E3). Every output will be LOW unless E1 and E2 are LOW and E3 is HIGH. This multiple e

3-to-8 line decoder/demultiplexer