QUADRUPLE 2-INPUT POSITIVE-NAND GATES WITH OPEN-DRAIN OUTPUTS

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QUADRUPLE2-INPUT POSITIVE-AND GATES WITH OPEN-DRAIN OUTPUTS

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封装/外壳：14-TSSOP（0.173"，4.40mm 宽） 包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 描述：IC GATE NAND OD 4CH 2-IN 14TSSOP 集成电路（IC） 门和反相器

QUADRUPLE2-INPUT POSITIVE-AND GATES WITH OPEN-DRAIN OUTPUTS

文件：570.13 Kbytes Page：15 Pages

QUADRUPLE 2-INPUT POSITIVE-NAND GATES WITH OPEN-DRAIN OUTPUTS

文件：418.51 Kbytes Page：13 Pages

QUADRUPLE2-INPUT POSITIVE-AND GATES WITH OPEN-DRAIN OUTPUTS

文件：570.13 Kbytes Page：15 Pages

QUADRUPLE 2-INPUT POSITIVE-NAND GATES WITH OPEN-DRAIN OUTPUTS

文件：418.51 Kbytes Page：13 Pages

QUADRUPLE2-INPUT POSITIVE-AND GATES WITH OPEN-DRAIN OUTPUTS

文件：570.13 Kbytes Page：15 Pages

封装/外壳：14-TSSOP（0.173"，4.40mm 宽） 包装：管件 描述：IC GATE NAND OD 4CH 2-IN 14TSSOP 集成电路（IC） 门和反相器

QUADRUPLE2-INPUT POSITIVE-AND GATES WITH OPEN-DRAIN OUTPUTS

文件：570.13 Kbytes Page：15 Pages

QUADRUPLE 2-INPUT POSITIVE-NAND GATES WITH OPEN-DRAIN OUTPUTS

文件：418.51 Kbytes Page：13 Pages

QUADRUPLE2-INPUT POSITIVE-AND GATES WITH OPEN-DRAIN OUTPUTS

文件：570.13 Kbytes Page：15 Pages

Quad 2-input NAND gate; open-drain output

1. General description The 74HC03; 74HCT03 is a quad 2-input NAND gate with open-drain outputs. Inputs include clamp diodes that enable the use of current limiting resistors to interface inputs to voltages in excess of VCC. 2. Features and benefits • Wide supply voltage range from 2.0 V to 6.

High Speed CMOS Logic

Features Output Drive Capability: 10 LSTTL Loads Low Input Current: 1μA Outputs directly interface CMOS, NMOS and TTL Operating Voltage Range: 2V to 6V CMOS High Noise Immunity Function compatible with 74LS03.

Quad 2-input NAND gate

GENERAL DESCRIPTION The 74HC/HCT03 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT03 provide the 2-input NAND function The 74HC/HCT03 have open-drain N-transistor outputs

Quad 2-input NAND gate

GENERAL DESCRIPTION The 74HC/HCT03 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT03 provide the 2-input NAND function The 74HC/HCT03 have open-drain N-transistor outputs

High Speed CMOS Logic

文件：407.27 Kbytes Page：5 Pages