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SN74GTLPH306价格
参考价格：￥18.4924
型号：SN74GTLPH306DGVR 品牌：TI 备注：这里有SN74GTLPH306多少钱，2025年最近7天走势，今日出价，今日竞价，SN74GTLPH306批发/采购报价，SN74GTLPH306行情走势销售排行榜，SN74GTLPH306报价。| 型号 | 功能描述 | 生产厂家 企业 | LOGO | 操作 |
|---|---|---|---|---|
SN74GTLPH306 | 8-BIT LVTTL-TO-GTLP BUS TRANSCEIVER FEATURES · TI-OPC™ Circuitry Limits Ringing on Unevenly Loaded Backplanes · OEC™ Circuitry Improves Signal Integrity and Reduces Electromagnetic Interference · Bidirectional Interface Between GTLP Signal Levels and LVTTL Logic Levels · LVTTL Interfaces Are 5-V Tolerant · Medium-Drive GTLP | TI 德州仪器 |   | |
SN74GTLPH306 | 8-BIT LVTTL-TO-GTLP BUS TRANSCEIVER 文件：255.78 Kbytes Page：1 Pages | TI 德州仪器 | | |
SN74GTLPH306 | 8-BIT LVTTL-TO-GTLP BUS TRANSCEIVER 文件：589.34 Kbytes Page：17 Pages | TI 德州仪器 | | |
SN74GTLPH306 | 8 位 LVTTL 到 GTLP 总线收发器 | TI 德州仪器 | | |
8-BIT LVTTL-TO-GTLP BUS TRANSCEIVER FEATURES · TI-OPC™ Circuitry Limits Ringing on Unevenly Loaded Backplanes · OEC™ Circuitry Improves Signal Integrity and Reduces Electromagnetic Interference · Bidirectional Interface Between GTLP Signal Levels and LVTTL Logic Levels · LVTTL Interfaces Are 5-V Tolerant · Medium-Drive GTLP | TI 德州仪器 | | ||
8-BIT LVTTL-TO-GTLP BUS TRANSCEIVER FEATURES · TI-OPC™ Circuitry Limits Ringing on Unevenly Loaded Backplanes · OEC™ Circuitry Improves Signal Integrity and Reduces Electromagnetic Interference · Bidirectional Interface Between GTLP Signal Levels and LVTTL Logic Levels · LVTTL Interfaces Are 5-V Tolerant · Medium-Drive GTLP | TI 德州仪器 | | ||
8-BIT LVTTL-TO-GTLP BUS TRANSCEIVER FEATURES · TI-OPC™ Circuitry Limits Ringing on Unevenly Loaded Backplanes · OEC™ Circuitry Improves Signal Integrity and Reduces Electromagnetic Interference · Bidirectional Interface Between GTLP Signal Levels and LVTTL Logic Levels · LVTTL Interfaces Are 5-V Tolerant · Medium-Drive GTLP | TI 德州仪器 | | ||
8-BIT LVTTL-TO-GTLP BUS TRANSCEIVER FEATURES · TI-OPC™ Circuitry Limits Ringing on Unevenly Loaded Backplanes · OEC™ Circuitry Improves Signal Integrity and Reduces Electromagnetic Interference · Bidirectional Interface Between GTLP Signal Levels and LVTTL Logic Levels · LVTTL Interfaces Are 5-V Tolerant · Medium-Drive GTLP | TI 德州仪器 | | ||
8-BIT LVTTL-TO-GTLP BUS TRANSCEIVER FEATURES · TI-OPC™ Circuitry Limits Ringing on Unevenly Loaded Backplanes · OEC™ Circuitry Improves Signal Integrity and Reduces Electromagnetic Interference · Bidirectional Interface Between GTLP Signal Levels and LVTTL Logic Levels · LVTTL Interfaces Are 5-V Tolerant · Medium-Drive GTLP | TI 德州仪器 | | ||
8-BIT LVTTL-TO-GTLP BUS TRANSCEIVER FEATURES · TI-OPC™ Circuitry Limits Ringing on Unevenly Loaded Backplanes · OEC™ Circuitry Improves Signal Integrity and Reduces Electromagnetic Interference · Bidirectional Interface Between GTLP Signal Levels and LVTTL Logic Levels · LVTTL Interfaces Are 5-V Tolerant · Medium-Drive GTLP | TI 德州仪器 | | ||
8-BIT LVTTL-TO-GTLP BUS TRANSCEIVER FEATURES · TI-OPC™ Circuitry Limits Ringing on Unevenly Loaded Backplanes · OEC™ Circuitry Improves Signal Integrity and Reduces Electromagnetic Interference · Bidirectional Interface Between GTLP Signal Levels and LVTTL Logic Levels · LVTTL Interfaces Are 5-V Tolerant · Medium-Drive GTLP | TI 德州仪器 | | ||
8-BIT LVTTL-TO-GTLP BUS TRANSCEIVER FEATURES · TI-OPC™ Circuitry Limits Ringing on Unevenly Loaded Backplanes · OEC™ Circuitry Improves Signal Integrity and Reduces Electromagnetic Interference · Bidirectional Interface Between GTLP Signal Levels and LVTTL Logic Levels · LVTTL Interfaces Are 5-V Tolerant · Medium-Drive GTLP | TI 德州仪器 | | ||
8-BIT LVTTL-TO-GTLP BUS TRANSCEIVER FEATURES · TI-OPC™ Circuitry Limits Ringing on Unevenly Loaded Backplanes · OEC™ Circuitry Improves Signal Integrity and Reduces Electromagnetic Interference · Bidirectional Interface Between GTLP Signal Levels and LVTTL Logic Levels · LVTTL Interfaces Are 5-V Tolerant · Medium-Drive GTLP | TI 德州仪器 | | ||
8-BIT LVTTL-TO-GTLP BUS TRANSCEIVER FEATURES · TI-OPC™ Circuitry Limits Ringing on Unevenly Loaded Backplanes · OEC™ Circuitry Improves Signal Integrity and Reduces Electromagnetic Interference · Bidirectional Interface Between GTLP Signal Levels and LVTTL Logic Levels · LVTTL Interfaces Are 5-V Tolerant · Medium-Drive GTLP | TI 德州仪器 | | ||
8-BIT LVTTL-TO-GTLP BUS TRANSCEIVER FEATURES · TI-OPC™ Circuitry Limits Ringing on Unevenly Loaded Backplanes · OEC™ Circuitry Improves Signal Integrity and Reduces Electromagnetic Interference · Bidirectional Interface Between GTLP Signal Levels and LVTTL Logic Levels · LVTTL Interfaces Are 5-V Tolerant · Medium-Drive GTLP | TI 德州仪器 | | ||
8-BIT LVTTL-TO-GTLP BUS TRANSCEIVER FEATURES · TI-OPC™ Circuitry Limits Ringing on Unevenly Loaded Backplanes · OEC™ Circuitry Improves Signal Integrity and Reduces Electromagnetic Interference · Bidirectional Interface Between GTLP Signal Levels and LVTTL Logic Levels · LVTTL Interfaces Are 5-V Tolerant · Medium-Drive GTLP | TI 德州仪器 | | ||
8-BIT LVTTL-TO-GTLP BUS TRANSCEIVER FEATURES · TI-OPC™ Circuitry Limits Ringing on Unevenly Loaded Backplanes · OEC™ Circuitry Improves Signal Integrity and Reduces Electromagnetic Interference · Bidirectional Interface Between GTLP Signal Levels and LVTTL Logic Levels · LVTTL Interfaces Are 5-V Tolerant · Medium-Drive GTLP | TI 德州仪器 | | ||
8-BIT LVTTL-TO-GTLP BUS TRANSCEIVER FEATURES · TI-OPC™ Circuitry Limits Ringing on Unevenly Loaded Backplanes · OEC™ Circuitry Improves Signal Integrity and Reduces Electromagnetic Interference · Bidirectional Interface Between GTLP Signal Levels and LVTTL Logic Levels · LVTTL Interfaces Are 5-V Tolerant · Medium-Drive GTLP | TI 德州仪器 | | ||
8-BIT LVTTL-TO-GTLP BUS TRANSCEIVER FEATURES · TI-OPC™ Circuitry Limits Ringing on Unevenly Loaded Backplanes · OEC™ Circuitry Improves Signal Integrity and Reduces Electromagnetic Interference · Bidirectional Interface Between GTLP Signal Levels and LVTTL Logic Levels · LVTTL Interfaces Are 5-V Tolerant · Medium-Drive GTLP | TI 德州仪器 | | ||
8-BIT LVTTL-TO-GTLP BUS TRANSCEIVER FEATURES · TI-OPC™ Circuitry Limits Ringing on Unevenly Loaded Backplanes · OEC™ Circuitry Improves Signal Integrity and Reduces Electromagnetic Interference · Bidirectional Interface Between GTLP Signal Levels and LVTTL Logic Levels · LVTTL Interfaces Are 5-V Tolerant · Medium-Drive GTLP | TI 德州仪器 | | ||
8-BIT LVTTL-TO-GTLP BUS TRANSCEIVER FEATURES · TI-OPC™ Circuitry Limits Ringing on Unevenly Loaded Backplanes · OEC™ Circuitry Improves Signal Integrity and Reduces Electromagnetic Interference · Bidirectional Interface Between GTLP Signal Levels and LVTTL Logic Levels · LVTTL Interfaces Are 5-V Tolerant · Medium-Drive GTLP | TI 德州仪器 | | ||
8-BIT LVTTL-TO-GTLP BUS TRANSCEIVER FEATURES · TI-OPC™ Circuitry Limits Ringing on Unevenly Loaded Backplanes · OEC™ Circuitry Improves Signal Integrity and Reduces Electromagnetic Interference · Bidirectional Interface Between GTLP Signal Levels and LVTTL Logic Levels · LVTTL Interfaces Are 5-V Tolerant · Medium-Drive GTLP | TI 德州仪器 | | ||
8-BIT LVTTL-TO-GTLP BUS TRANSCEIVER FEATURES · TI-OPC™ Circuitry Limits Ringing on Unevenly Loaded Backplanes · OEC™ Circuitry Improves Signal Integrity and Reduces Electromagnetic Interference · Bidirectional Interface Between GTLP Signal Levels and LVTTL Logic Levels · LVTTL Interfaces Are 5-V Tolerant · Medium-Drive GTLP | TI 德州仪器 | | ||
8-BIT LVTTL-TO-GTLP BUS TRANSCEIVER FEATURES · TI-OPC™ Circuitry Limits Ringing on Unevenly Loaded Backplanes · OEC™ Circuitry Improves Signal Integrity and Reduces Electromagnetic Interference · Bidirectional Interface Between GTLP Signal Levels and LVTTL Logic Levels · LVTTL Interfaces Are 5-V Tolerant · Medium-Drive GTLP | TI 德州仪器 | | ||
8-BIT LVTTL-TO-GTLP BUS TRANSCEIVER FEATURES · TI-OPC™ Circuitry Limits Ringing on Unevenly Loaded Backplanes · OEC™ Circuitry Improves Signal Integrity and Reduces Electromagnetic Interference · Bidirectional Interface Between GTLP Signal Levels and LVTTL Logic Levels · LVTTL Interfaces Are 5-V Tolerant · Medium-Drive GTLP | TI 德州仪器 | | ||
8-BIT LVTTL-TO-GTLP BUS TRANSCEIVER FEATURES · TI-OPC™ Circuitry Limits Ringing on Unevenly Loaded Backplanes · OEC™ Circuitry Improves Signal Integrity and Reduces Electromagnetic Interference · Bidirectional Interface Between GTLP Signal Levels and LVTTL Logic Levels · LVTTL Interfaces Are 5-V Tolerant · Medium-Drive GTLP | TI 德州仪器 | | ||
8-BIT LVTTL-TO-GTLP BUS TRANSCEIVER FEATURES · TI-OPC™ Circuitry Limits Ringing on Unevenly Loaded Backplanes · OEC™ Circuitry Improves Signal Integrity and Reduces Electromagnetic Interference · Bidirectional Interface Between GTLP Signal Levels and LVTTL Logic Levels · LVTTL Interfaces Are 5-V Tolerant · Medium-Drive GTLP | TI 德州仪器 | | ||
8-BIT LVTTL-TO-GTLP BUS TRANSCEIVER FEATURES · TI-OPC™ Circuitry Limits Ringing on Unevenly Loaded Backplanes · OEC™ Circuitry Improves Signal Integrity and Reduces Electromagnetic Interference · Bidirectional Interface Between GTLP Signal Levels and LVTTL Logic Levels · LVTTL Interfaces Are 5-V Tolerant · Medium-Drive GTLP | TI 德州仪器 | | ||
8-BIT LVTTL-TO-GTLP BUS TRANSCEIVER 文件：589.34 Kbytes Page：17 Pages | TI 德州仪器 | | ||
8-BIT LVTTL-TO-GTLP BUS TRANSCEIVER 文件：589.34 Kbytes Page：17 Pages | TI 德州仪器 | | ||
8-BIT LVTTL-TO-GTLP BUS TRANSCEIVER 文件：255.78 Kbytes Page：1 Pages | TI 德州仪器 | | ||
8-BIT LVTTL-TO-GTLP BUS TRANSCEIVER 文件：255.78 Kbytes Page：1 Pages | TI 德州仪器 | | ||
8-BIT LVTTL-TO-GTLP BUS TRANSCEIVER 文件：589.34 Kbytes Page：17 Pages | TI 德州仪器 | | ||
封装/外壳：24-SOIC（0.295"，7.50mm 宽） 包装：卷带（TR） 描述：IC TRNSLTR BIDIRECTIONAL 24SOIC 集成电路（IC） 转换器，电平移位器 | TI 德州仪器 | | ||
8-BIT LVTTL-TO-GTLP BUS TRANSCEIVER 文件：255.78 Kbytes Page：1 Pages | TI 德州仪器 | | ||
8-BIT LVTTL-TO-GTLP BUS TRANSCEIVER 文件：589.34 Kbytes Page：17 Pages | TI 德州仪器 | | ||
封装/外壳：24-SOIC（0.295"，7.50mm 宽） 包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 描述：IC TRNSLTR BIDIRECTIONAL 24SOIC 集成电路（IC） 转换器，电平移位器 | TI 德州仪器 | | ||
8-BIT LVTTL-TO-GTLP BUS TRANSCEIVER 文件：589.34 Kbytes Page：17 Pages | TI 德州仪器 | | ||
8-BIT LVTTL-TO-GTLP BUS TRANSCEIVER 文件：255.78 Kbytes Page：1 Pages | TI 德州仪器 | | ||
8-BIT LVTTL-TO-GTLP BUS TRANSCEIVER 文件：589.34 Kbytes Page：17 Pages | TI 德州仪器 | |
SN74GTLPH306产品属性
- 类型
描述
- 型号
SN74GTLPH306
- 功能描述
转换 - 电压电平 8bit LVTTL-GTLP
- RoHS
否
- 制造商
Micrel
- 类型
CML/LVDS/LVPECL to LVCMOS/LVTTL
- 传播延迟时间
1.9 ns
- 电源电流
14 mA
- 电源电压-最大
3.6 V
- 电源电压-最小
3 V
- 最大工作温度
+ 85 C
- 安装风格
SMD/SMT
- 封装/箱体
MLF-8
| IC供应商 | 芯片型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
|---|---|---|---|---|---|---|---|
TI/德州仪器 |
25+ |
25000 |
原厂原包 深圳现货 主打品牌 假一赔百 可开票! |
||||
TI |
25+23+ |
TSSOP24 |
43363 |
绝对原装正品全新进口深圳现货 |
|||
TI |
25+ |
TSSOP24 |
4500 |
全新原装、诚信经营、公司现货销售! |
|||
TI/德州仪器 |
2450+ |
TSSOP24P |
6540 |
只做原厂原装正品现货或订货!终端工厂可以申请样品! |
|||
TI |
23+ |
TSSOP24 |
3200 |
正规渠道,只有原装! |
|||
TI |
23+ |
NA |
20000 |
||||
TI/德州仪器 |
24+ |
TSSOP24 |
57000 |
只做全新原装进口现货 |
|||
TI/德州仪器 |
25+ |
SOIC-24 |
860000 |
明嘉莱只做原装正品现货 |
|||
TI |
TSSOP24 |
2560 |
一级代理 原装正品假一罚十价格优势长期供货 |
||||
TI |
24+ |
TSSOP24 |
1218 |
SN74GTLPH306规格书下载地址
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