丝印代码：SN74F175N；QUADRUPLE D-TYPE FLIP-FLOP WITH CLEAR

Contains Four Flip-Flops With Double-Rail Outputs Buffered Clock and Direct Clear Inputs Applications Include: – Buffer/Storage Registers – Shift Registers – Pattern Generators description This positive-edge-triggered flip-flop utilizes TTL circuitry to implement D-type flip-flop logic

QUADRUPLE D-TYPE FLIP-FLOPS WITH CLEAR

文件：72.87 Kbytes Page：5 Pages

QUADRUPLE D-TYPE FLIP-FLOPS WITH CLEAR

文件：72.87 Kbytes Page：5 Pages

Quad D flip-flop

DESCRIPTION The 74F175A is a quad, edge-triggered D-type flip-flop with individual D inputs and both Q and Q outputs. The common buffered Clock (CP) and Master Reset (MR) inputs load and reset (clear) all flip-flops simultaneously. FEATURES • Four edge-triggered D-type flip-flops • B

Quad D flip-flop

DESCRIPTION The 74F175A is a quad, edge-triggered D-type flip-flop with individual D inputs and both Q and Q outputs. The common buffered Clock (CP) and Master Reset (MR) inputs load and reset (clear) all flip-flops simultaneously. FEATURES • Four edge-triggered D-type flip-flops • B

Quad D flip-flop

DESCRIPTION The 74F175A is a quad, edge-triggered D-type flip-flop with individual D inputs and both Q and Q outputs. The common buffered Clock (CP) and Master Reset (MR) inputs load and reset (clear) all flip-flops simultaneously. FEATURES • Four edge-triggered D-type flip-flops • B