LOW POWER, 1.8/2.5/3.3-V INPUT, 3.3-V CMOS OUTPUT, SINGLE SCHMITT-TRIGGER INVERTER GATE

文件：164.32 Kbytes Page：11 Pages

LOW POWER, 1.8/2.5/3.3-V INPUT, 3.3-V CMOS OUTPUT, SINGLE SCHMITT-TRIGGER INVERTER GATE

文件：164.32 Kbytes Page：11 Pages

LOW POWER, 1.8/2.5/3.3-V INPUT, 3.3-V CMOS OUTPUT, SINGLE SCHMITT-TRIGGER INVERTER GATE

文件：761.98 Kbytes Page：14 Pages

Low-power inverter with voltage-level translator

1. General description The 74AUP1T14 provides a single inverting function. This device ensures a very low static and dynamic power consumption across the entire VCC range from 2.3 V to 3.6 V. The 74AUP1T14 is designed for logic-level translation applications with input switching levels that ac

Low-power inverter with voltage-level translator

1. General description The 74AUP1T14 provides a single inverting function. This device ensures a very low static and dynamic power consumption across the entire VCC range from 2.3 V to 3.6 V. The 74AUP1T14 is designed for logic-level translation applications with input switching levels that ac

Low-power inverter with voltage-level translator

1. General description The 74AUP1T14 provides a single inverting function. This device ensures a very low static and dynamic power consumption across the entire VCC range from 2.3 V to 3.6 V. The 74AUP1T14 is designed for logic-level translation applications with input switching levels that ac