SN74AUP1G74 Low-Power Single Positive-Edge-Triggered D-Type Flip-Flop With Clear and Preset

1 Features 1• Available in the Texas Instruments NanoStar™ Package • Low Static-Power Consumption: ICC = 0.9 μA Maximum • Low Dynamic-Power Consumption: Cpd = 5.5 pF Typical at 3.3 V • Low Input Capacitance: Ci = 1.5 pF Typical • Low Noise – Overshoot and Undershoot

Low-power D-type flip-flop with set and reset; positive-edge trigger

1. General description The 74AUP1G74 is a single positive edge triggered D-type flip-flop with individual data (D), clock (CP), set (SD) and reset (RD) inputs, and complementary Q and Q outputs. Data at the D-input that meets the set-up and hold time requirements on the LOW-to-HIGH clock transi

Low-power D-type flip-flop with set and reset; positive-edge trigger

文件：112.63 Kbytes Page：23 Pages

Low-power D-type flip-flop with set and reset; positive-edge trigger

Low-power D-type flip-flop with set and reset; positive-edge trigger

文件：112.63 Kbytes Page：23 Pages

Low-power D-type flip-flop with set and reset; positive-edge trigger