SNx4AHC373 Octal Transparent D-Type Latches With 3-State Outputs

1 Features • Operating range of 2V to 5.5V VCC • Latch-up performance exceeds 250mA per JESD 17 • On products compliant to MIL-PRF-38535, all parameters are tested unless otherwise noted. On all other products, production processing does not necessarily include testing of all parameters.

Octal D-type transparent latch; 3-state

DESCRIPTION The 74AHC/AHCT373 are high-speed Si-gate CMOS devices and are pin compatible with Low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • ESD protection: HBM EIA/JESD22-A114-A exceeds 2000 V MM EIA/JESD22-A115-A exceeds 200 V

Octal D-type transparant latch; 3-state

1. General description The 74AHC373 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard No. 7-A. The 74AHC373 consists of eight D-type transparent latches featuring separate D-type inputs for each latc

Octal D-type transparant latch; 3-state

1. General description The 74AHC373 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard No. 7-A. The 74AHC373 consists of eight D-type transparent latches featuring separate D-type inputs for each latc

Octal D-type transparent latch; 3-state

DESCRIPTION The 74AHC/AHCT373 are high-speed Si-gate CMOS devices and are pin compatible with Low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • ESD protection: HBM EIA/JESD22-A114-A exceeds 2000 V MM EIA/JESD22-A115-A exceeds 200 V

Octal D-type transparant latch; 3-state