丝印代码：AHC32MEP；QUADRUPLE 2-INPUT POSITIVE-OR GATE

Controlled Baseline – One Assembly/Test Site, One Fabrication Site Extended Temperature Performance of –55°C to 125°C Enhanced Diminishing Manufacturing Sources (DMS) Support Enhanced Product-Change Notification Qualification Pedigree† EPIC (Enhanced-Performance Implanted CMOS) Process

QUADRUPLE 2-INPUT POSITIVE-OR GATE

文件：433.59 Kbytes Page：9 Pages

封装/外壳：14-SOIC（0.154"，3.90mm 宽） 包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 描述：IC GATE OR 4CH 2-INP 14SOIC 集成电路（IC） 门和反相器

丝印代码：AHC32MEP；QUADRUPLE 2-INPUT POSITIVE-OR GATE

Controlled Baseline – One Assembly/Test Site, One Fabrication Site Extended Temperature Performance of –55°C to 125°C Enhanced Diminishing Manufacturing Sources (DMS) Support Enhanced Product-Change Notification Qualification Pedigree† EPIC (Enhanced-Performance Implanted CMOS) Process

QUADRUPLE 2-INPUT POSITIVE-OR GATES

文件：637.2 Kbytes Page：18 Pages

QUADRUPLE 2-INPUT POSITIVE-OR GATES

文件：637.2 Kbytes Page：18 Pages

Quad 2-input OR gate

DESCRIPTION The 74AHC/AHCT32 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard No. 7A. The 74AHC/AHCT32 provides the 2-input OR function. FEATURES • ESD protection: HBM EIA/JESD22-A114-A exc

Quad 2-input OR gate

DESCRIPTION The 74AHC/AHCT32 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard No. 7A. The 74AHC/AHCT32 provides the 2-input OR function. FEATURES • ESD protection: HBM EIA/JESD22-A114-A exc

Quad 2-input OR gate

DESCRIPTION The 74AHC/AHCT32 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard No. 7A. The 74AHC/AHCT32 provides the 2-input OR function. FEATURES • ESD protection: HBM EIA/JESD22-A114-A exc