Quad 2-input OR gate

DESCRIPTION The 74AHC/AHCT32 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard No. 7A. The 74AHC/AHCT32 provides the 2-input OR function. FEATURES • ESD protection: HBM EIA/JESD22-A114-A exc

Quad 2-input OR gate

Quad 2-input OR gate

1. General description The 74AHC32; 74AHCT32 is a quad 2-input OR gate. Inputs are overvoltage tolerant. This feature allows the use of these devices as translators in mixed voltage environments. 2. Features and benefits • Wide supply voltage range from 2.0 V to 5.5 V • Input levels: • For 7

Quad 2-input OR gate

The 74AHC32; 74AHCT32 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard No. 7-A.\n The 74AHC32; 74AHCT32 provides the 2-input OR function. • Balanced propagation delays\n• All inputs have Schmitt-trigger actions\n• Inputs accept voltages higher than VCC\n• Input levels:• For 74AHC32: CMOS level\n• For 74AHCT32: TTL level\n\n• ESD protection:• HBM EIA/JESD22-A114E exceeds 2000 V\n• MM EIA/JESD22-A115-A exceeds 200 V\n• CDM EIA/JESD22-C1;

Quad 2-input OR gate

The 74AHC32-Q100; 74AHCT32-Q100 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard No. 7-A.\n The 74AHC32-Q100; 74AHCT32-Q100 provides the 2-input OR function.\n This product has been qualified to the • Automotive product qualification in accordance with AEC-Q100 (Grade 1)• Specified from -40 °C to +85 °C and from -40 °C to +125 °C\n\n• Balanced propagation delays\n• All inputs have Schmitt-trigger actions\n• Inputs accept voltages higher than VCC\n• Input levels:• For 74AHC32-Q100: CMOS level\n•;

Quad 2-input OR gate

General description The 74AHC32-Q100; 74AHCT32-Q100 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard No. 7-A. The 74AHC32-Q100; 74AHCT32-Q100 provides the 2-input OR function. This product has been q

封装/外壳：14-SOIC（0.154"，3.90mm 宽） 包装：管件 描述：IC GATE OR 4CH 2-INP 14SO 集成电路（IC） 门和反相器

封装/外壳：14-SOIC（0.154"，3.90mm 宽） 包装：卷带（TR） 描述：IC GATE OR 4CH 2-INP 14SO 集成电路（IC） 门和反相器

Quad 2-input OR gate

DESCRIPTION The 74AHC/AHCT32 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard No. 7A. The 74AHC/AHCT32 provides the 2-input OR function. FEATURES • ESD protection: HBM EIA/JESD22-A114-A exc

Quad 2-input OR gate

DESCRIPTION The 74AHC/AHCT32 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard No. 7A. The 74AHC/AHCT32 provides the 2-input OR function. FEATURES • ESD protection: HBM EIA/JESD22-A114-A exc

QUADRUPLE 2-INPUT POSITIVE-OR GATES

文件：637.2 Kbytes Page：18 Pages

QUADRUPLE 2-INPUT POSITIVE-OR GATES

文件：637.2 Kbytes Page：18 Pages