HEX INVERTER

Controlled Baseline − One Assembly/Test Site, One Fabrication Site Extended Temperature Performance of −55°C to 125°C Enhanced Diminishing Manufacturing Sources (DMS) Support Enhanced Product-Change Notification Qualification Pedigree† EPIC (Enhanced-Performance Implanted CMOS) Process

Hex inverter

DESCRIPTION The 74AHC/AHCT04 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard No. 7A. The 74AHC/AHCT04 provide six inverting buffers. FEATURES • ESD protection: HBM EIA/JESD22-A114-A exceed

Hex inverter

1. General description The 74AHC04; 74AHCT04 is a high-speed Si-gate CMOS device and is pin compatible with Lowpower Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard No. 7-A. The 74AHC04; 74AHCT04 provides six inverting buffers. 2. Features and benefits • Balanced propa

Hex inverter

1. General description The 74AHC04; 74AHCT04 is a high-speed Si-gate CMOS device and is pin compatible with Lowpower Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard No. 7-A. The 74AHC04; 74AHCT04 provides six inverting buffers. 2. Features and benefits • Balanced propa

Hex inverter

DESCRIPTION The 74AHC/AHCT04 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard No. 7A. The 74AHC/AHCT04 provide six inverting buffers. FEATURES • ESD protection: HBM EIA/JESD22-A114-A exceed

HEX INVERTERS

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