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SN74ABT16823DGGR价格
参考价格：￥10.7872
型号：SN74ABT16823DGGR 品牌：TI 备注：这里有SN74ABT16823DGGR多少钱，2025年最近7天走势，今日出价，今日竞价，SN74ABT16823DGGR批发/采购报价，SN74ABT16823DGGR行情走势销售排行榜，SN74ABT16823DGGR报价。| 型号 | 功能描述 | 生产厂家 企业 | LOGO | 操作 |
|---|---|---|---|---|
SN74ABT16823DGGR | 18-BIT BUS-INTERFACE FLIP-FLOPS WITH 3-STATE OUTPUTS Members of the Texas Instruments WidebusE Family State-of-the-Art EPIC-IIBE BiCMOS Design Significantly Reduces Power Dissipation High-Impedance State During Power Up and Power Down ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R | TI 德州仪器 |   | |
SN74ABT16823DGGR | 18-BIT BUS-INTERFACE FLIP-FLOPS WITH 3-STATE OUTPUTS Members of the Texas Instruments WidebusE Family State-of-the-Art EPIC-IIBE BiCMOS Design Significantly Reduces Power Dissipation High-Impedance State During Power Up and Power Down ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R | TI 德州仪器 | | |
SN74ABT16823DGGR | 封装/外壳：56-TFSOP（0.240"，6.10mm 宽） 功能：主复位 包装：管件 描述：IC FF D-TYPE DUAL 9BIT 56TSSOP 集成电路（IC） 触发器 | TI 德州仪器 | | |
SN74ABT16823DGGR | 18-BIT BUS-INTERFACE FLIP-FLOPS WITH 3-STATE OUTPUTS 文件：235.37 Kbytes Page：14 Pages | TI 德州仪器 | | |
SN74ABT16823DGGR | 18-BIT BUS-INTERFACE FLIP-FLOPS WITH 3-STATE OUTPUTS 文件：388.7 Kbytes Page：17 Pages | TI 德州仪器 | | |
18-BIT BUS-INTERFACE FLIP-FLOPS WITH 3-STATE OUTPUTS 文件：133.15 Kbytes Page：9 Pages | TI 德州仪器 | | ||
18-BIT BUS-INTERFACE FLIP-FLOPS WITH 3-STATE OUTPUTS Members of the Texas Instruments WidebusE Family State-of-the-Art EPIC-IIBE BiCMOS Design Significantly Reduces Power Dissipation High-Impedance State During Power Up and Power Down ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R | TI 德州仪器 | | ||
18-BIT BUS-INTERFACE FLIP-FLOPS WITH 3-STATE OUTPUTS Members of the Texas Instruments WidebusE Family State-of-the-Art EPIC-IIBE BiCMOS Design Significantly Reduces Power Dissipation High-Impedance State During Power Up and Power Down ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R | TI 德州仪器 | | ||
18-BIT BUS-INTERFACE FLIP-FLOPS WITH 3-STATE OUTPUTS Members of the Texas Instruments WidebusE Family State-of-the-Art EPIC-IIBE BiCMOS Design Significantly Reduces Power Dissipation High-Impedance State During Power Up and Power Down ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R | TI 德州仪器 | | ||
18-BIT BUS-INTERFACE FLIP-FLOPS WITH 3-STATE OUTPUTS Members of the Texas Instruments WidebusE Family State-of-the-Art EPIC-IIBE BiCMOS Design Significantly Reduces Power Dissipation High-Impedance State During Power Up and Power Down ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R | TI 德州仪器 | | ||
18-BIT BUS-INTERFACE FLIP-FLOPS WITH 3-STATE OUTPUTS Members of the Texas Instruments WidebusE Family State-of-the-Art EPIC-IIBE BiCMOS Design Significantly Reduces Power Dissipation High-Impedance State During Power Up and Power Down ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R | TI 德州仪器 | | ||
18-bit bus interface D-type flip-flop with reset and enable 3-State DESCRIPTION The 74ABT16823A 18-bit bus interface register is designed to eliminate the extra packages required to buffer existing registers and provide extra data width for wider data/address paths of buses carrying parity. FEATURES • Two sets of high speed parallel registers with positive edge | Philips 飞利浦 | | ||
18-bit bus interface D-type flip-flop with reset and enable 3-State DESCRIPTION The 74ABT16823A 18-bit bus interface register is designed to eliminate the extra packages required to buffer existing registers and provide extra data width for wider data/address paths of buses carrying parity. FEATURES • Two sets of high speed parallel registers with positive edge | Philips 飞利浦 | | ||
18-bit bus interface D-type flip-flop with reset and enable 3-State DESCRIPTION The 74ABT16823A 18-bit bus interface register is designed to eliminate the extra packages required to buffer existing registers and provide extra data width for wider data/address paths of buses carrying parity. FEATURES • Two sets of high speed parallel registers with positive edge | Philips 飞利浦 | | ||
18-bit bus interface D-type flip-flop with reset and enable 3-State DESCRIPTION The 74ABT16823A 18-bit bus interface register is designed to eliminate the extra packages required to buffer existing registers and provide extra data width for wider data/address paths of buses carrying parity. FEATURES • Two sets of high speed parallel registers with positive edge | Philips 飞利浦 | |
SN74ABT16823DGGR产品属性
- 类型
描述
- 型号
SN74ABT16823DGGR
- 功能描述
触发器 18but Flip Flop
- RoHS
否
- 制造商
Texas Instruments
- 电路数量
2
- 逻辑系列
SN74
- 逻辑类型
D-Type Flip-Flop
- 极性
Inverting, Non-Inverting
- 输入类型
CMOS
- 传播延迟时间
4.4 ns
- 高电平输出电流
- 16 mA
- 低电平输出电流
16 mA
- 电源电压-最大
5.5 V
- 最大工作温度
+ 85 C
- 安装风格
SMD/SMT
- 封装/箱体
X2SON-8
- 封装
Reel
| IC供应商 | 芯片型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
|---|---|---|---|---|---|---|---|
TI(德州仪器) |
24+ |
TSSOP566 |
2317 |
只做原装,提供一站式配单服务,代工代料。BOM配单 |
|||
TI/德州仪器 |
24+ |
NA/ |
2261 |
优势代理渠道,原装正品,可全系列订货开增值税票 |
|||
TI/德州仪器 |
25+ |
原厂封装 |
10280 |
原厂授权代理,专注军工、汽车、医疗、工业、新能源！ |
|||
TI |
22+ |
56TFSOP 60UFQFN |
9000 |
原厂渠道,现货配单 |
|||
SN74ABT16823DGGR |
25+ |
1314 |
1314 |
||||
TI |
05+ |
原厂原装 |
4051 |
只做全新原装真实现货供应 |
|||
Texas Instruments |
25+ |
56-TSSOP |
9350 |
独立分销商 公司只做原装 诚心经营 免费试样正品保证 |
|||
TI |
24+ |
TSSOP-56 |
90000 |
一级代理商进口原装现货、假一罚十价格合理 |
|||
TI |
24+ |
TSSOP |
2000 |
只做原装，欢迎询价，量大价优 |
|||
TI |
23+ |
TSSOP |
5000 |
全新原装,支持实单,非诚勿扰 |
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SN74ABT16823DGGR规格书下载地址
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DdatasheetPDF页码索引
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