16-BIT REGISTERED TRANSCEIVERS WITH 3-STATE OUTPUTS

Members of the Texas Instruments WidebusE Family State-of-the-Art EPIC-IIBE BiCMOS Design Significantly Reduces Power Dissipation Latch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD-17 Typical VOLP (Output Ground Bounce)

16-bit latched transceivers with dual enable 3-State

DESCRIPTION The 74ABT16543 high-performance BiCMOS device combines low static and dynamic power dissipation with high speed and high output drive. The 74ABT16543 16-bit registered transceiver contains two sets of D-type latches for temporary storage of data flowing in either direction. Separate

16-Bit Registered Transceiver with 3-STATE Outputs

General Description The ABT16543 16-bit transceiver contains two sets of D-type latches for temporary storage of data flowing in either direction. Separate Latch Enable and Output Enable inputs are provided for each register to permit independent control of inputting and outputting in either dire

16-Bit Registered Transceiver with 3-STATE Outputs

General Description The ABT16543 16-bit transceiver contains two sets of D-type latches for temporary storage of data flowing in either direction. Separate Latch Enable and Output Enable inputs are provided for each register to permit independent control of inputting and outputting in either dire

16-Bit Registered Transceiver with 3-STATE Outputs

General Description The ABT16543 16-bit transceiver contains two sets of D-type latches for temporary storage of data flowing in either direction. Separate Latch Enable and Output Enable inputs are provided for each register to permit independent control of inputting and outputting in either dire

16-Bit Registered Transceiver with 3-STATE Outputs

General Description The ABT16543 16-bit transceiver contains two sets of D-type latches for temporary storage of data flowing in either direction. Separate Latch Enable and Output Enable inputs are provided for each register to permit independent control of inputting and outputting in either dire