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SN74ABT16543DGG价格
参考价格：￥5.2464
型号：SN74ABT16543DGGR 品牌：TI 备注：这里有SN74ABT16543DGG多少钱，2026年最近7天走势，今日出价，今日竞价，SN74ABT16543DGG批发/采购报价，SN74ABT16543DGG行情走势销售排行榜，SN74ABT16543DGG报价。| 型号 | 功能描述 | 生产厂家 企业 | LOGO | 操作 |
|---|---|---|---|---|
SN74ABT16543DGG | 16-BIT REGISTERED TRANSCEIVERS WITH 3-STATE OUTPUTS 文件：139.34 Kbytes Page：13 Pages | TI 德州仪器 |   | |
16-BIT REGISTERED TRANSCEIVERS WITH 3-STATE OUTPUTS Members of the Texas Instruments WidebusE Family State-of-the-Art EPIC-IIBE BiCMOS Design Significantly Reduces Power Dissipation Latch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD-17 Typical VOLP (Output Ground Bounce) | TI 德州仪器 | | ||
16-BIT REGISTERED TRANSCEIVERS WITH 3-STATE OUTPUTS Members of the Texas Instruments WidebusE Family State-of-the-Art EPIC-IIBE BiCMOS Design Significantly Reduces Power Dissipation Latch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD-17 Typical VOLP (Output Ground Bounce) | TI 德州仪器 | | ||
16-BIT REGISTERED TRANSCEIVERS WITH 3-STATE OUTPUTS Members of the Texas Instruments WidebusE Family State-of-the-Art EPIC-IIBE BiCMOS Design Significantly Reduces Power Dissipation Latch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD-17 Typical VOLP (Output Ground Bounce) | TI 德州仪器 | | ||
16-BIT REGISTERED TRANSCEIVERS WITH 3-STATE OUTPUTS Members of the Texas Instruments WidebusE Family State-of-the-Art EPIC-IIBE BiCMOS Design Significantly Reduces Power Dissipation Latch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD-17 Typical VOLP (Output Ground Bounce) | TI 德州仪器 | | ||
16-BIT REGISTERED TRANSCEIVERS WITH 3-STATE OUTPUTS Members of the Texas Instruments WidebusE Family State-of-the-Art EPIC-IIBE BiCMOS Design Significantly Reduces Power Dissipation Latch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD-17 Typical VOLP (Output Ground Bounce) | TI 德州仪器 | | ||
16-BIT REGISTERED TRANSCEIVERS WITH 3-STATE OUTPUTS Members of the Texas Instruments WidebusE Family State-of-the-Art EPIC-IIBE BiCMOS Design Significantly Reduces Power Dissipation Latch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD-17 Typical VOLP (Output Ground Bounce) | TI 德州仪器 | | ||
16-BIT REGISTERED TRANSCEIVERS WITH 3-STATE OUTPUTS Members of the Texas Instruments WidebusE Family State-of-the-Art EPIC-IIBE BiCMOS Design Significantly Reduces Power Dissipation Latch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD-17 Typical VOLP (Output Ground Bounce) | TI 德州仪器 | | ||
封装/外壳：56-TFSOP（0.240"，6.10mm 宽） 包装：管件 描述：IC TXRX NON-INVERT 5.5V 56TSSOP 集成电路（IC） 缓冲器，驱动器，接收器，收发器 | TI 德州仪器 | | ||
16-BIT REGISTERED TRANSCEIVERS WITH 3-STATE OUTPUTS 文件：139.34 Kbytes Page：13 Pages | TI 德州仪器 | | ||
16-BIT REGISTERED TRANSCEIVERS WITH 3-STATE OUTPUTS 文件：399.78 Kbytes Page：15 Pages | TI 德州仪器 | | ||
16-Bit Registered Transceiver with 3-STATE Outputs General Description The ABT16543 16-bit transceiver contains two sets of D-type latches for temporary storage of data flowing in either direction. Separate Latch Enable and Output Enable inputs are provided for each register to permit independent control of inputting and outputting in either dire | FAIRCHILD 仙童半导体 | | ||
16-bit latched transceivers with dual enable 3-State DESCRIPTION The 74ABT16543 high-performance BiCMOS device combines low static and dynamic power dissipation with high speed and high output drive. The 74ABT16543 16-bit registered transceiver contains two sets of D-type latches for temporary storage of data flowing in either direction. Separate | PHILIPS 飞利浦 | | ||
16-Bit Registered Transceiver with 3-STATE Outputs General Description The ABT16543 16-bit transceiver contains two sets of D-type latches for temporary storage of data flowing in either direction. Separate Latch Enable and Output Enable inputs are provided for each register to permit independent control of inputting and outputting in either dire | FAIRCHILD 仙童半导体 | | ||
16-Bit Registered Transceiver with 3-STATE Outputs General Description The ABT16543 16-bit transceiver contains two sets of D-type latches for temporary storage of data flowing in either direction. Separate Latch Enable and Output Enable inputs are provided for each register to permit independent control of inputting and outputting in either dire | FAIRCHILD 仙童半导体 | | ||
16-Bit Registered Transceiver with 3-STATE Outputs General Description The ABT16543 16-bit transceiver contains two sets of D-type latches for temporary storage of data flowing in either direction. Separate Latch Enable and Output Enable inputs are provided for each register to permit independent control of inputting and outputting in either dire | FAIRCHILD 仙童半导体 | |
SN74ABT16543DGG产品属性
- 类型
描述
- 型号
SN74ABT16543DGG
- 制造商
TI
- 制造商全称
Texas Instruments
- 功能描述
16-BIT REGISTERED TRANSCEIVERS WITH 3-STATE OUTPUTS
| IC供应商 | 芯片型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
|---|---|---|---|---|---|---|---|
TI(德州仪器) |
25+ |
TSSOP56 |
2886 |
原装现货,免费供样,技术支持,原厂对接 |
|||
TI |
25+ |
TSSOP-56 |
20948 |
样件支持,可原厂排单订货! |
|||
TI/德州仪器 |
16+ |
TSSOP56 |
627 |
原装现货 |
|||
TI/德州仪器 |
22+ |
TSSOP56 |
3800 |
只做原装,价格优惠,长期供货。 |
|||
TI |
23+ |
TSSOP |
5000 |
全新原装,支持实单,非诚勿扰 |
|||
TEXAS |
24+ |
TSSOP |
6868 |
原装现货,可开13%税票 |
|||
TI/德州仪器 |
22+ |
TSSOP56 |
12245 |
现货,原厂原装假一罚十! |
|||
TI |
25+23+ |
TSSOP56 |
42396 |
绝对原装正品全新进口深圳现货 |
|||
TI/德州仪器 |
25+ |
TSSOP56 |
12500 |
全新原装现货,假一赔十 |
|||
TI |
23+ |
TSSOP-56 |
21739 |
公司原装现货!主营品牌!可含税欢迎查询 |
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SN74ABT16543DGG规格书下载地址
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DdatasheetPDF页码索引
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