16-BIT TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS

Members of the Texas Instruments WidebusE Family State-of-the-Art EPIC-IIBE BiCMOS Design Significantly Reduces Power Dissipation Latch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD-17 Typical VOLP (Output Ground Bounce)

16-Bit Transparent D-Type Latch with 3-STATE Outputs

General Description The ABT16373 contains sixteen non-inverting latches with 3-STATE outputs and is intended for bus oriented applications. The device is byte controlled. The flip-flops appear transparent to the data when the Latch Enable (LE) is HIGH. When LE is LOW, the data that meets the setu

16-bit transparent latch 3-State

DESCRIPTION The 74ABT16373B high-performance BiCMOS device combines low static and dynamic power dissipation with high speed and high output drive. FEATURES • 16-bit transparent latch • Multiple VCC and GND pins minimize switching noise • Power-up 3-State • Live insertion/extraction permitte

16-bit transparent latch 3-State

DESCRIPTION The 74ABT16373B high-performance BiCMOS device combines low static and dynamic power dissipation with high speed and high output drive. FEATURES • 16-bit transparent latch • Multiple VCC and GND pins minimize switching noise • Power-up 3-State • Live insertion/extraction permitte

16-bit transparent latch 3-State

DESCRIPTION The 74ABT16373B high-performance BiCMOS device combines low static and dynamic power dissipation with high speed and high output drive. FEATURES • 16-bit transparent latch • Multiple VCC and GND pins minimize switching noise • Power-up 3-State • Live insertion/extraction permitte

16-Bit Transparent D-Type Latch with 3-STATE Outputs

General Description The ABT16373 contains sixteen non-inverting latches with 3-STATE outputs and is intended for bus oriented applications. The device is byte controlled. The flip-flops appear transparent to the data when the Latch Enable (LE) is HIGH. When LE is LOW, the data that meets the setu