3.3-V Dual Differential LVPECL/LVDS Buffer to LVTTL Translator

1FEATURES · Dual 3.3-V Differential LVPECL/LVDS to LVTTL Buffer Translator · 24-mA LVTTL Ouputs · Operating Range – PECL VCC = 3 V to 3.6 V With GND = 0 V · Support for Clock Frequencies to >180 MHz · 2-ns Typical Propagation Delay · Internal Input Pullup and Pulldown Resistors · Built-i

3.3-V Dual Differential LVPECL/LVDS Buffer to LVTTL Translator

文件：271.19 Kbytes Page：10 Pages

封装/外壳：8-SOIC（0.154"，3.90mm 宽） 包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 描述：IC TRNSLTR UNIDIRECTIONAL 8SOIC 集成电路（IC） 转换器，电平移位器

3.3-V Dual Differential LVPECL/LVDS Buffer to LVTTL Translator

1FEATURES · Dual 3.3-V Differential LVPECL/LVDS to LVTTL Buffer Translator · 24-mA LVTTL Ouputs · Operating Range – PECL VCC = 3 V to 3.6 V With GND = 0 V · Support for Clock Frequencies to >180 MHz · 2-ns Typical Propagation Delay · Internal Input Pullup and Pulldown Resistors · Built-i

3.3-V Dual Differential LVPECL/LVDS Buffer to LVTTL Translator

文件：271.19 Kbytes Page：10 Pages

3.3-V Dual Differential LVPECL/LVDS Buffer to LVTTL Translator

1FEATURES · Dual 3.3-V Differential LVPECL/LVDS to LVTTL Buffer Translator · 24-mA LVTTL Ouputs · Operating Range – PECL VCC = 3 V to 3.6 V With GND = 0 V · Support for Clock Frequencies to >180 MHz · 2-ns Typical Propagation Delay · Internal Input Pullup and Pulldown Resistors · Built-i

3.3-V Dual Differential LVPECL/LVDS Buffer to LVTTL Translator

1FEATURES · Dual 3.3-V Differential LVPECL/LVDS to LVTTL Buffer Translator · 24-mA LVTTL Ouputs · Operating Range – PECL VCC = 3 V to 3.6 V With GND = 0 V · Support for Clock Frequencies to >180 MHz · 2-ns Typical Propagation Delay · Internal Input Pullup and Pulldown Resistors · Built-i

3.3-V Dual Differential LVPECL/LVDS Buffer to LVTTL Translator

1FEATURES · Dual 3.3-V Differential LVPECL/LVDS to LVTTL Buffer Translator · 24-mA LVTTL Ouputs · Operating Range – PECL VCC = 3 V to 3.6 V With GND = 0 V · Support for Clock Frequencies to >180 MHz · 2-ns Typical Propagation Delay · Internal Input Pullup and Pulldown Resistors · Built-i

3.3-V Dual Differential LVPECL/LVDS Buffer to LVTTL Translator

1FEATURES · Dual 3.3-V Differential LVPECL/LVDS to LVTTL Buffer Translator · 24-mA LVTTL Ouputs · Operating Range – PECL VCC = 3 V to 3.6 V With GND = 0 V · Support for Clock Frequencies to >180 MHz · 2-ns Typical Propagation Delay · Internal Input Pullup and Pulldown Resistors · Built-i

3.3-V Dual Differential LVPECL/LVDS Buffer to LVTTL Translator

文件：271.19 Kbytes Page：10 Pages