4-BIT D-TYPE REGISTERS WITH 3-STATE OUTPUTS

3-State Outputs Interface Directly With System Bus Gated Output-Control LInes for Enabling or Disabling the Outputs Fully Independent Clock Virtually Eliminates Restrictions for Operating in One of Two Modes: – Parallel Load – Do Nothing (Hold) For Application as Bus Buffer Registers Pac

4-BIT D-TYPE REGISTER WITH 3-STATE OUTPUTS

4-BIT D-TYPE REGISTERWITH 3-STATE OUTPUTS The SN54/74LS173A is a high-speed 4-BitRegister featuring 3-state outputs foruse in bus-organized systems. The clock is fully edge-triggered allowingeither a load from the D inputs ora hold (retain register contents) dependingon the state of the Input E

具有三态输出的 4 位 D 类寄存器

The '173 and 'LS173A 4-bit registers include D-type flip-flops featuring totem-pole 3-state outputs capable of driving highly capacitive or relatively low-impedance loads. The high-impedance third state and increased high-logic-level drive provide these flip-flops with the capability of being connec • 3-State Outputs Interface Directly With System Bus• Gated Output-Control LInes for Enabling or Disabling the Outputs• Fully Independent Clock Virtually Eliminates Restrictions for Operating in One of Two Modes:• Parallel Load• Do Nothing (Hold)• For Application as Bus Buffer Registers• Package Opt;

4-BIT D-TYPE REGISTER WITH 3-STATE OUTPUTS

4-BIT D-TYPE REGISTERS WITH 3-STATE OUTPUTS

文件：562.82 Kbytes Page：19 Pages

丝印代码：SN54LS173AJ；4-BIT D-TYPE REGISTERS WITH 3-STATE OUTPUTS

3-State Outputs Interface Directly With System Bus Gated Output-Control LInes for Enabling or Disabling the Outputs Fully Independent Clock Virtually Eliminates Restrictions for Operating in One of Two Modes: – Parallel Load – Do Nothing (Hold) For Application as Bus Buffer Registers Pac

丝印代码：SN54LS173AJ；4-BIT D-TYPE REGISTERS WITH 3-STATE OUTPUTS

3-State Outputs Interface Directly With System Bus Gated Output-Control LInes for Enabling or Disabling the Outputs Fully Independent Clock Virtually Eliminates Restrictions for Operating in One of Two Modes: – Parallel Load – Do Nothing (Hold) For Application as Bus Buffer Registers Pac

4-BIT D-TYPE REGISTERS WITH 3-STATE OUTPUTS

文件：562.82 Kbytes Page：19 Pages

4-BIT D-TYPE REGISTERS WITH 3-STATE OUTPUTS

文件：497.3 Kbytes Page：20 Pages

4-BIT D-TYPE REGISTERS WITH 3-STATE OUTPUTS

文件：562.82 Kbytes Page：19 Pages

4-BIT D-TYPE REGISTERS WITH 3-STATE OUTPUTS

文件：562.82 Kbytes Page：19 Pages

4-BIT D-TYPE REGISTER WITH 3-STATE OUTPUTS

4-BIT D-TYPE REGISTERWITH 3-STATE OUTPUTS The SN54/74LS173A is a high-speed 4-BitRegister featuring 3-state outputs foruse in bus-organized systems. The clock is fully edge-triggered allowingeither a load from the D inputs ora hold (retain register contents) dependingon the state of the Input E

4-BIT D-TYPE REGISTERS WITH 3-STATE OUTPUTS

文件：562.82 Kbytes Page：19 Pages