| 型号 | 功能描述 | 生产厂家 企业 | LOGO | 操作 |
|---|---|---|---|---|
SN54LS112FK | DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR 文件：300.4 Kbytes Page：9 Pages | TI 德州仪器 |   | |
DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP The SN54 /74LS112A dual JKflip-flop features individual J, K, clock, and asynchronousset and clear inputs to each flip-flop. When the clock goes HIGH,the inputs are enabled and data will be accepted. The logic level of the Jand K inputs may be allowed to change when the clock pulse is HIGH and the | MOTOROLA 摩托罗拉 | | ||
DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP The SN54 /74LS112A dual JKflip-flop features individual J, K, clock, and asynchronousset and clear inputs to each flip-flop. When the clock goes HIGH,the inputs are enabled and data will be accepted. The logic level of the Jand K inputs may be allowed to change when the clock pulse is HIGH and the | MOTOROLA 摩托罗拉 | | ||
DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR 文件：300.4 Kbytes Page：9 Pages | TI 德州仪器 | | ||
DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR 文件：300.4 Kbytes Page：9 Pages | TI 德州仪器 | | ||
DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR 文件：300.4 Kbytes Page：9 Pages | TI 德州仪器 | |
| IC供应商 | 芯片型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
|---|---|---|---|---|---|---|---|
si-en |
25+ |
SMD |
4258 |
原装正品 价格优势 |
|||
TI |
23+ |
48VQFN |
3200 |
公司只做原装，可来电咨询 |
|||
TI |
25+ |
48VQFN |
20000 |
原装 |
|||
TI |
25+ |
TSSOP |
15000 |
全新原装现货,假一赔十 |
|||
Texas Instruments |
24+ |
48-VQFN(7x7) |
65200 |
一级代理/放心采购 |
|||
TI |
25+ |
48VQFN |
750 |
只做原装进口!正品支持实单! |
|||
TI/德州仪器 |
26+ |
WSON-8 |
8880 |
原装认准芯泽盛世！ |
|||
TI |
三年内 |
1983 |
只做原装正品 |
||||
SI-EN |
23+ |
SMD |
50000 |
全新原装正品现货,支持订货 |
|||
TI |
11+ |
48VQFN |
750 |
一级代理,专注军工、汽车、医疗、工业、新能源、电力 |
SN54LS112FK芯片相关品牌
SN54LS112FK规格书下载地址
SN54LS112FK参数引脚图相关
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