丝印代码：SN54HC42J；4-LINE TO 10-LINE DECODERS (1 of 10)

Wide Operating Voltage Range of 2 V to 6 V Outputs Can Drive Up To 10 LSTTL Loads Low Power Consumption, 80-μA Max ICC Typical tpd = 14 ns ±4-mA Output Drive at 5 V Low Input Current of 1 μA Max Full Decoding of Input Logic All Outputs Are High for Invalid BCD Conditions Also for Applicat

丝印代码：SN54HC42J；4-LINE TO 10-LINE DECODERS (1 of 10)

Wide Operating Voltage Range of 2 V to 6 V Outputs Can Drive Up To 10 LSTTL Loads Low Power Consumption, 80-μA Max ICC Typical tpd = 14 ns ±4-mA Output Drive at 5 V Low Input Current of 1 μA Max Full Decoding of Input Logic All Outputs Are High for Invalid BCD Conditions Also for Applicat

4-LINE TO 10-LINE DECODERS 1 of 10

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4-LINE TO 10-LINE DECODERS(1 OF 10)

文件：562.73 Kbytes Page：15 Pages

4-LINE TO 10-LINE DECODERS (1 OF 10)

文件：413.29 Kbytes Page：13 Pages

High-Speed CMOS Logic BCD-to-Decimal Decoders (1 of 10)

Features • Buffered Inputs and Outputs • Typical Propagation Delay: 12ns at VCC = 5V, CL = 15pF, TA = 25oC • Fanout (Over Temperature Range) - Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads - Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads • Wide Operating Tempera

BCD TO DECIMAL DECODER

DESCRIPTION The M54/74HC42 is a high speed CMOS BCD-TO-DECIMAL DECODER fabricated in silicon gate C2MOS technology. It has the same high speed performance of LSTTL combined with true CMOS low power consumption. ■ HIGH SPEED tPD = 13 ns (TYP.) AT VCC = 5 V ■ LOW POWER DISSIPATION ICC = 4 µA (MA

High-Speed CMOS Logic BCD-to-Decimal Decoders (1 of 10)

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High-Speed CMOS Logic BCD-to-Decimal Decoders

文件：261.339 Kbytes Page：10 Pages

BCD-to-Decimal Decoder

文件：149.4 Kbytes Page：4 Pages