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Quad 2-Input NAND Gate

Quad 2-Input NAND Gate High-Voltage Silicon-Gate CMOS The SL4011B NAND gates provide the system designer with direct emplementation of the NAND function. • Operating Voltage Range: 3.0 to 18 V • Maximum input current of 1 μA at 18 V over full package temperature range; 100 nA at 18 V and 25°C

Quad 2-Input NAND Gate

Quad 2-Input NAND Gate High-Voltage Silicon-Gate CMOS The SL4011B NAND gates provide the system designer with direct emplementation of the NAND function. • Operating Voltage Range: 3.0 to 18 V • Maximum input current of 1 μA at 18 V over full package temperature range; 100 nA at 18 V and 25°C

Quad 2-Input NAND Gate

Quad 2-Input NAND Gate High-Voltage Silicon-Gate CMOS The SL4011B NAND gates provide the system designer with direct emplementation of the NAND function. • Operating Voltage Range: 3.0 to 18 V • Maximum input current of 1 μA at 18 V over full package temperature range; 100 nA at 18 V and 25°C

Dual 4-Input NAND Gate

Dual 4-Input NAND Gate High-Voltage Silicon-Gate CMOS The SL4012B NAND gates provide the system designer with direct emplementation of the NAND function. • Operating Voltage Range: 3.0 to 18 V • Maximum input current of 1 μA at 18 V over full package temperature range; 100 nA at 18 V and 25°

Dual 4-Input NAND Gate

Dual 4-Input NAND Gate High-Voltage Silicon-Gate CMOS The SL4012B NAND gates provide the system designer with direct emplementation of the NAND function. • Operating Voltage Range: 3.0 to 18 V • Maximum input current of 1 μA at 18 V over full package temperature range; 100 nA at 18 V and 25°

Dual 4-Input NAND Gate

Dual 4-Input NAND Gate High-Voltage Silicon-Gate CMOS The SL4012B NAND gates provide the system designer with direct emplementation of the NAND function. • Operating Voltage Range: 3.0 to 18 V • Maximum input current of 1 μA at 18 V over full package temperature range; 100 nA at 18 V and 25°

Dual D Flip-Flop

Dual D Flip-Flop High-Voltage Silicon-Gate CMOS The SL4013B consists of two identical, independent data-type flip-flops. Each flip-flop has independent data, set, reset, and clock inputs and Q and Q outputs. These devices can be used for shift register applications, and, by connecting Q output t

Dual D Flip-Flop

Dual D Flip-Flop High-Voltage Silicon-Gate CMOS The SL4013B consists of two identical, independent data-type flip-flops. Each flip-flop has independent data, set, reset, and clock inputs and Q and Q outputs. These devices can be used for shift register applications, and, by connecting Q output t

Dual D Flip-Flop

Dual D Flip-Flop High-Voltage Silicon-Gate CMOS The SL4013B consists of two identical, independent data-type flip-flops. Each flip-flop has independent data, set, reset, and clock inputs and Q and Q outputs. These devices can be used for shift register applications, and, by connecting Q output t

Dual 4-Stage Static Shift Register

Dual 4-Stage Static Shift Register High-Voltage Silicon-Gate CMOS The SL4015B consists of two identical, independent, 4-stage serial input/parallel-output registers. Each register has independent CLOCK and RESET inputs as well as a single serial DATA input. “Q” outputs are available from e

Dual 4-Stage Static Shift Register

Dual 4-Stage Static Shift Register High-Voltage Silicon-Gate CMOS The SL4015B consists of two identical, independent, 4-stage serial input/parallel-output registers. Each register has independent CLOCK and RESET inputs as well as a single serial DATA input. “Q” outputs are available from e

Dual 4-Stage Static Shift Register

Dual 4-Stage Static Shift Register High-Voltage Silicon-Gate CMOS The SL4015B consists of two identical, independent, 4-stage serial input/parallel-output registers. Each register has independent CLOCK and RESET inputs as well as a single serial DATA input. “Q” outputs are available from e

Counter/Divider

Counter/Divider High-Voltage Silicon-Gate CMOS The SL4017B is 5-stage Johnson counter having 10 decoded outputs. Inputs include a CLOCK, a RESET, and a CLOCK INHIBIT signal. Schmitt trigger action in the CLOCK input circuit provides pulse shaping that allows unlimited clock input pulse rise an

Counter/Divider

Counter/Divider High-Voltage Silicon-Gate CMOS The SL4017B is 5-stage Johnson counter having 10 decoded outputs. Inputs include a CLOCK, a RESET, and a CLOCK INHIBIT signal. Schmitt trigger action in the CLOCK input circuit provides pulse shaping that allows unlimited clock input pulse rise an

Counter/Divider

Counter/Divider High-Voltage Silicon-Gate CMOS The SL4017B is 5-stage Johnson counter having 10 decoded outputs. Inputs include a CLOCK, a RESET, and a CLOCK INHIBIT signal. Schmitt trigger action in the CLOCK input circuit provides pulse shaping that allows unlimited clock input pulse rise an

Quad AND/OR Select Gate

Quad AND/OR Select Gate High-Voltage Silicon-Gate CMOS The SL4019B types consist of four AND/OR select gate configurations, each consisting of two 2-input AND gates driving a single 2-input gate. Selection is accomplished by control bits Sa and Sb .In addition to selection of either channel A or

Quad AND/OR Select Gate

Quad AND/OR Select Gate High-Voltage Silicon-Gate CMOS The SL4019B types consist of four AND/OR select gate configurations, each consisting of two 2-input AND gates driving a single 2-input gate. Selection is accomplished by control bits Sa and Sb .In addition to selection of either channel A or

Quad AND/OR Select Gate

Quad AND/OR Select Gate High-Voltage Silicon-Gate CMOS The SL4019B types consist of four AND/OR select gate configurations, each consisting of two 2-input AND gates driving a single 2-input gate. Selection is accomplished by control bits Sa and Sb .In addition to selection of either channel A or

DC-DC升压IC

Quad 2-Input NAND Gate

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