Network Synchronizer for SyncE/ 1588 PTP Telecom Boundary (T-BC) and Slave (T-TSC) Clocks

KEY FEATURES • Three independent DSPLLs in a single monolithic IC supporting flexible SyncE/ IEEE 1588 and SETS architectures • Ultra-low jitter of 100 fs • Input frequency range: • External crystal: 48 to 54 MHz • REF clock: 5 to 250 MHz • Diff clock: 8 kHz to 750 MHz • LVCMOS clock: 8 k

适用于 SyncE、SONET/SDH/PDH 和 IEEE 1588 的 Si5348A 网络同步器时钟

Si5348A 是适用于同步以太网、SONET/SDH 和 PDH (T1/E1) 应用的网络同步器和抖动衰减器。Si5348A 采用了第四代 DSPLL 技术，能够为需要最高抖动性能的应用提供任意频率的时钟产生和抖动衰减。无需外部回路滤波器元件，而且 PLL 带宽可通过数字编程设置为低至 0.001 Hz。相位抖动低至 0.15 RMS 的 Si5348A 可接受 5 个 0.008 - 750 MHz 的时钟输入，而且最多可生成 7 个 0.000001 MHz 至 718.5 MHz 的时钟输出频率。Si5348A 符合 ITU-T G.8262 EEC 选项 1 和 2、G.812 类

Network Synchronizer for SyncE/ 1588 PTP Telecom Boundary (T-BC) and Slave (T-SC) Clocks

文件：815.01 Kbytes Page：54 Pages

Network Synchronizer Clock for SyncE, SONET/SDH/PDH, and IEEE 1588

The Si5348A clock, with internal servo algorithm, paired with the Si5388-SW protocol stack is a complete IEEE 1588 and SyncE solution targeting applications that use a centralized “pizza box” architecture.  The Si5348A is a network synchronizer clock for Synchronous Ethernet, SONET/SDH, and PDH (T1/

Network Synchronizer for SyncE/ 1588 PTP Telecom Boundary (T-BC) and Slave (T-TSC) Clocks

KEY FEATURES • Three independent DSPLLs in a single monolithic IC supporting flexible SyncE/ IEEE 1588 and SETS architectures • Ultra-low jitter of 100 fs • Input frequency range: • External crystal: 48 to 54 MHz • REF clock: 5 to 250 MHz • Diff clock: 8 kHz to 750 MHz • LVCMOS clock: 8 k

Network Synchronizer for SyncE/ 1588 PTP Telecom Boundary (T-BC) and Slave (T-SC) Clocks

KEY FEATURES • Three independent DSPLLs in a single monolithic IC supporting flexible SyncE/ IEEE 1588 and SETS architectures • Ultra-low jitter of 95 fs • Enhanced hitless switching minimizes output phase transients • Input frequency range: • External crystal: 48 to 54 MHz • REF clock: 5

Network Synchronizer Clock for SyncE, SONET/SDH/PDH, and IEEE 1588

The Si5348B clock, with internal servo algorithm, paired with the Si5388-SW protocol stack is a complete IEEE 1588 and SyncE solution targeting applications that use a centralized “pizza box” architecture.  The Si5348B is a network synchronizer clock for Synchronous Ethernet, SONET/SDH, and PDH (T1/

Network Synchronizer for SyncE/ 1588 PTP Telecom Boundary (T-BC) and Slave (T-TSC) Clocks

KEY FEATURES • Three independent DSPLLs in a single monolithic IC supporting flexible SyncE/ IEEE 1588 and SETS architectures • Ultra-low jitter of 100 fs • Input frequency range: • External crystal: 48 to 54 MHz • REF clock: 5 to 250 MHz • Diff clock: 8 kHz to 750 MHz • LVCMOS clock: 8 k

Network Synchronizer for SyncE/ 1588 PTP Telecom Boundary (T-BC) and Slave (T-SC) Clocks

KEY FEATURES • Three independent DSPLLs in a single monolithic IC supporting flexible SyncE/ IEEE 1588 and SETS architectures • Ultra-low jitter of 95 fs • Enhanced hitless switching minimizes output phase transients • Input frequency range: • External crystal: 48 to 54 MHz • REF clock: 5

Network Synchronizer for SyncE/ 1588 PTP Telecom Boundary (T-BC) and Slave (T-TSC) Clocks

KEY FEATURES • Three independent DSPLLs in a single monolithic IC supporting flexible SyncE/ IEEE 1588 and SETS architectures • Ultra-low jitter of 100 fs • Input frequency range: • External crystal: 48 to 54 MHz • REF clock: 5 to 250 MHz • Diff clock: 8 kHz to 750 MHz • LVCMOS clock: 8 k

Network Synchronizer for SyncE/ 1588 PTP Telecom Boundary (T-BC) and Slave (T-TSC) Clocks

KEY FEATURES • Three independent DSPLLs in a single monolithic IC supporting flexible SyncE/ IEEE 1588 and SETS architectures • Ultra-low jitter of 100 fs • Input frequency range: • External crystal: 48 to 54 MHz • REF clock: 5 to 250 MHz • Diff clock: 8 kHz to 750 MHz • LVCMOS clock: 8 k

Network Synchronizer for SyncE/ 1588 PTP Telecom Boundary (T-BC) and Slave (T-SC) Clocks

KEY FEATURES • Three independent DSPLLs in a single monolithic IC supporting flexible SyncE/ IEEE 1588 and SETS architectures • Ultra-low jitter of 95 fs • Enhanced hitless switching minimizes output phase transients • Input frequency range: • External crystal: 48 to 54 MHz • REF clock: 5

Network Synchronizer for SyncE/ 1588 PTP Telecom Boundary (T-BC) and Slave (T-SC) Clocks

KEY FEATURES • Three independent DSPLLs in a single monolithic IC supporting flexible SyncE/ IEEE 1588 and SETS architectures • Ultra-low jitter of 95 fs • Enhanced hitless switching minimizes output phase transients • Input frequency range: • External crystal: 48 to 54 MHz • REF clock: 5

包装：卷带（TR） 描述：IC NETWORK SYNCRONIZER 集成电路（IC） 时钟发生器，PLL，频率合成器

封装/外壳：64-VFQFN 裸露焊盘 包装：卷带（TR） 描述：IC CLOCK GEN TO 712.5MHZ 64QFN 集成电路（IC） 时钟发生器，PLL，频率合成器

Network Synchronizer for SyncE/ 1588 PTP Telecom Boundary (T-BC) and Slave (T-SC) Clocks

文件：815.01 Kbytes Page：54 Pages

Network Synchronizer for SyncE/ 1588 PTP Telecom Boundary (T-BC) and Slave (T-SC) Clocks

文件：880.52 Kbytes Page：54 Pages

Network Synchronizer for SyncE/ 1588 PTP Telecom Boundary (T-BC) and Slave (T-SC) Clocks

文件：880.52 Kbytes Page：54 Pages

Network Synchronizer for SyncE/ 1588 PTP Telecom Boundary (T-BC) and Slave (T-SC) Clocks

文件：815.01 Kbytes Page：54 Pages

Network Synchronizer for SyncE/ 1588 PTP Telecom Boundary (T-BC) and Slave (T-SC) Clocks

文件：880.52 Kbytes Page：54 Pages

Network Synchronizer for SyncE/ 1588 PTP Telecom Boundary (T-BC) and Slave (T-SC) Clocks

文件：815.01 Kbytes Page：54 Pages

Network Synchronizer for SyncE/ 1588 PTP Telecom Boundary (T-BC) and Slave (T-SC) Clocks

文件：880.52 Kbytes Page：54 Pages

Silicon Bridge Rectifier

Features: ● High Surge Current

SATURN USER NETWORK INTERFACE(155.52 & 51.84 MBIT/S)

DESCRIPTION The PM5348 Dual SATURN User Network Interface (S/UNI-DUAL) is a monolithic integrated circuit that implements SONET/SDH processing and ATM mapping functions for two 155 Mbit/s or 51Mbit/s ATM User Network Interfaces. It is compliant with SONET and SDH requirements and ATM Forum User N

Two-Channel ATM SATURN User Network Interface

文件：66.72 Kbytes Page：2 Pages

MONOCHIP TELETEXT AND VPS DECODER WITH 8 INTEGRATED PAGES

文件：684.68 Kbytes Page：22 Pages

MONOCHIP TELETEXT AND VPS DECODER WITH 8 INTEGRATED PAGES

文件：684.68 Kbytes Page：22 Pages